cancel
Showing results for 
Search instead for 
Did you mean: 

JTAG-DP in STM32F407: read+ APACC instruction returns zero

natalia
Associate
Posted on March 09, 2014 at 09:59

Hello everyone,

I use STM32F407 Discovery's JTAG-DP port controlled by basic TAP pins in my master thesis. I want to read access point's identification register (IDR) whose address is 0xFC.

That's what I do, basing on  ARM Debug Interface Architecture Specification ADIv5.0, p.1-25:

1) Having DPACC instruction loaded into TAP's instruction register, I choose the SELECT register and set SELECT.APBANKSEL to 0xF and SELECT.APSEL to 0x00.

2) I switch to APACC instruction.

3) I use AP register access with A[3:2]=0b11 + read operation.

As far as I understand the abovementioned description, these steps should led to a successful read of the ID register. However, each read returns ACK signal and all-zeros.

Did you have any similar problems or did I forget about some obvious operation? If yes - what should I do to enable the read operation?

Best regards,

Natalie

#stm32f4 #apacc #jtag-dp
3 REPLIES 3
stm322399
Senior
Posted on March 09, 2014 at 11:03

As far as I know, before acessing APs you need to enable power on debug domain, which is performed by writing DP register CTRLSTAT(0x04). It serves as well to clear some sticky flag that prevent AP accesses.

Writing 0x50000020 gives good results for me.

Do you succeed reading CSW before IDR ? CSW is simplier to read because it does not require bank switch.

Last, remember that reading operation are pipelined, so you get the read value at the next TAP DR scan.

natalia
Associate
Posted on March 09, 2014 at 18:48

Hello again,

After following your advice I could read both CSW and IDR (as well as other APACC registers). Anyway, it seems to work after setting DP register.

Thank you a lot, gentleman!

Best regards

Natalie

lijitajoseph1091
Associate II
Posted on June 24, 2016 at 15:46