STM32F429 Timer1 Capture/Compare with IRQ

der-kyle · ‎2015-01-28

Posted on January 28, 2015 at 13:02

Hello,

I use the Timer1 in capture compare mode. I want the following function:

1. Timer1 starts to count from 0

2. Timer1 counter register is the same, like in compare register => IRQ_CC

3. Timer1 counter register is the same, like in auto-reload register => IRQ_Update

And then from the beginning

My code works, but I have the problem, that first triggered IRQ_Update. If it runs a lot of time, its look like:

IRQ_Update

IRQ_CC

IRQ_Update

IRQ_CC

...

I dont understand, why it starts with IRQ_Update and not with IRQ_CC ?

Thank you in advance.

Best regards,

Dirk

TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;

RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM1, ENABLE);

TIM_TimeBaseStructure.TIM_Period = (double) HCLK_MHZ * period / 1000 - 1;

TIM_TimeBaseStructure.TIM_Period = 8100 - 1;

TIM_TimeBaseStructure.TIM_Prescaler = 0;

TIM_TimeBaseStructure.TIM_ClockDivision = TIM_CKD_DIV1;

TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;

TIM_TimeBaseStructure.TIM_RepetitionCounter = 0;

TIM_TimeBaseInit(TIM1, &TIM_TimeBaseStructure);

TIM_OCInitTypeDef TIM_OCInitStructure;

TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1;

TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Disable;

TIM_OCInitStructure.TIM_OutputNState = TIM_OutputNState_Enable;

TIM_OCInitStructure.TIM_Pulse = 1800-1;

TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_Low;

TIM_OCInitStructure.TIM_OCNPolarity = TIM_OCNPolarity_High;

TIM_OCInitStructure.TIM_OCIdleState = TIM_OCIdleState_Reset;

TIM_OCInitStructure.TIM_OCNIdleState = TIM_OCNIdleState_Reset;

TIM_OC1Init( TIM1, &TIM_OCInitStructure );

TIM_CtrlPWMOutputs(TIM1, ENABLE);

NVIC_InitTypeDef NVIC_InitStructure;

NVIC_InitStructure.NVIC_IRQChannel = TIM1_CC_IRQn;

NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;

NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;

NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;

NVIC_Init(&NVIC_InitStructure);

TIM_ITConfig(TIM1, TIM_IT_CC1, ENABLE);

NVIC_InitStructure.NVIC_IRQChannel = TIM1_UP_TIM10_IRQn;

NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;

NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;

NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;

NVIC_Init(&NVIC_InitStructure);

TIM_ITConfig(TIM1, TIM_IT_Update, ENABLE);

#stm32f4-timer1-compare

Tesla DeLorean · ‎2015-01-28

Posted on January 28, 2015 at 13:22

Because Update is the ''I'm loading it with zero'' event, ie as it rolls or resets.

You could always enable the Update interrupt in the CC one, or have you code be aware of the cases where it misses one or the other. ie Pulse > Period

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der-kyle · ‎2015-01-28

Posted on January 28, 2015 at 14:25

Hello clivel,

if I enable Update interrupt in the CC, it works fine. Thank you for that note.

But, one thing I dont understand.

1. I have tried to load the counter register with a value != 0, with the aim, that I dont get an update event at the beginning. But it does not works.

2. I have set the timer1 in downcounting mode, with the aim, that I dont get an update event at the beginning. But it does not works, too.

Thank you in advance.

Best regards,

Dirk