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STM32F429 Timer1 + DMA2 + SPI1

der-kyle
Associate II

‎2015-01-28 06:42 AM

Posted on January 28, 2015 at 15:42

Hello,

is the following possible?

Timer1 is in capture/compare mode. If an compare event is generated => start DMA2

DMA2 copy 2bytes in the data register of SPI1.

SPI1 send the 2bytes

I have try it, but I get no CLK signal. The only one is the OCx signal, that is ok. If Iwrite

SPI_I2S_SendData(SPI1, 0xAAFF);

 without the timer1, I get the signal.

Can you help me please?

Best regards,

Dirk

// init Timer1

    TIM_TimeBaseInitTypeDef    TIM_TimeBaseStructure;

    RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM1, ENABLE);

    

    TIM_TimeBaseStructure.TIM_Period = 8000-1;

    TIM_TimeBaseStructure.TIM_Prescaler = 0;     

    TIM_TimeBaseStructure.TIM_ClockDivision = TIM_CKD_DIV1;             

    TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;

    TIM_TimeBaseStructure.TIM_RepetitionCounter = 0;

    TIM_TimeBaseInit(TIM1, &TIM_TimeBaseStructure);

    TIM_OCInitTypeDef TIM_OCInitStructure;

    TIM_OCInitStructure.TIM_OCMode            = TIM_OCMode_PWM1;

    TIM_OCInitStructure.TIM_OutputState        = TIM_OutputState_Enable;

    TIM_OCInitStructure.TIM_OutputNState    = TIM_OutputNState_Enable;

    TIM_OCInitStructure.TIM_Pulse            = 1000-1;

    TIM_OCInitStructure.TIM_OCPolarity        = TIM_OCPolarity_High;

    TIM_OCInitStructure.TIM_OCNPolarity        = TIM_OCNPolarity_High;

    TIM_OCInitStructure.TIM_OCIdleState        = TIM_OCIdleState_Reset;  

    TIM_OCInitStructure.TIM_OCNIdleState    = TIM_OCNIdleState_Reset;  

    TIM_OC1Init( TIM1, &TIM_OCInitStructure );

    

    TIM_CtrlPWMOutputs(TIM1, ENABLE);

    

    NVIC_InitTypeDef NVIC_InitStructure;

    NVIC_InitStructure.NVIC_IRQChannel = TIM1_CC_IRQn;

    NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;

    NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;

    NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;

    NVIC_Init(&NVIC_InitStructure);

    TIM_ITConfig(TIM1, TIM_IT_CC1, ENABLE);

    NVIC_InitStructure.NVIC_IRQChannel = TIM1_UP_TIM10_IRQn;

    NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;

    NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;

    NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;

    NVIC_Init(&NVIC_InitStructure);

    TIM_ITConfig(TIM1, TIM_IT_Update, ENABLE);

    TIM_SelectCCDMA(TIM1, ENABLE);

    TIM_DMACmd(TIM1, TIM_DMA_CC1, ENABLE);

    

// init DMA    

    RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA2, ENABLE);

    

    DMA_InitStructure.DMA_Channel                 = DMA_Channel_6;

    DMA_InitStructure.DMA_PeripheralBaseAddr     = (uint32_t) & (SPI1->DR);

    DMA_InitStructure.DMA_Memory0BaseAddr        = (uint32_t) AdcBufferSend.begin_p;

    DMA_InitStructure.DMA_DIR                    = DMA_DIR_MemoryToPeripheral;

    DMA_InitStructure.DMA_BufferSize            = 1;

    DMA_InitStructure.DMA_PeripheralInc            = DMA_PeripheralInc_Disable;

    DMA_InitStructure.DMA_MemoryInc                = DMA_MemoryInc_Disable;

    DMA_InitStructure.DMA_PeripheralDataSize    = DMA_PeripheralDataSize_HalfWord;

    DMA_InitStructure.DMA_MemoryDataSize        = DMA_MemoryDataSize_HalfWord;

    DMA_InitStructure.DMA_Mode                    = DMA_Mode_Normal;

    DMA_InitStructure.DMA_Priority                = DMA_Priority_VeryHigh;

    DMA_InitStructure.DMA_FIFOMode                = DMA_FIFOMode_Disable;

    DMA_InitStructure.DMA_FIFOThreshold            = DMA_FIFOThreshold_Full;

    DMA_InitStructure.DMA_MemoryBurst            = DMA_MemoryBurst_Single;

    DMA_InitStructure.DMA_PeripheralBurst        = DMA_PeripheralBurst_Single;

    DMA_Init(DMA2_Stream5, &DMA_InitStructure);

    SPI_I2S_DMACmd( SPI1, SPI_I2S_DMAReq_Tx, ENABLE );

// init spi

    RCC_APB2PeriphClockCmd(RCC_APB2Periph_SPI1, ENABLE);

    SPI_I2S_DeInit(SPI1);

    SPI_InitTypeDef SPI_InitStructure;

    SPI_InitStructure.SPI_Direction         = SPI_Direction_2Lines_FullDuplex;

    SPI_InitStructure.SPI_Mode                 = SPI_Mode_Master;

    SPI_InitStructure.SPI_DataSize            = SPI_DataSize_16b;

    SPI_InitStructure.SPI_CPOL                = SPI_CPOL_Low;

    SPI_InitStructure.SPI_CPHA                = SPI_CPHA_1Edge;

    SPI_InitStructure.SPI_NSS                = SPI_NSS_Soft;

    SPI_InitStructure.SPI_BaudRatePrescaler = spiClockFrequency;

    SPI_InitStructure.SPI_FirstBit            = SPI_FirstBit_MSB;

    SPI_InitStructure.SPI_CRCPolynomial        = 0;

    SPI_Init(SPI1, &SPI_InitStructure );

    

//start    

    DMA_Cmd( DMA2_Stream0,ENABLE );

    DMA_Cmd( DMA2_Stream5,ENABLE );

    SPI_Cmd( SPI1, ENABLE );

    TIM_Cmd(TIM1, ENABLE);

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2 REPLIES 2
waclawek.jan
Guru

‎2015-01-28 07:23 AM

Posted on January 28, 2015 at 16:23

>  DMA_Cmd( DMA2_Stream0,ENABLE );

Tim1 Ch1 is tied to DMA2Stream1Channel6 or  DMA2Stream3Channel6 (or, a shared one, DMA2Stream6Channel0)

Similarly, you get the SPI->DMA wrong too.

JW
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der-kyle
Associate II

‎2015-01-31 02:21 AM

Posted on January 31, 2015 at 11:21

Hello,

thank you very much, for your answer. That was it.

Best regards,

Dirk

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