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STM32f0 Modulated Timer PWM

dschnell
Associate II
Posted on November 24, 2013 at 18:27

Hi,

I am playing around with the STM32f0 discovery board. The timers are very powerful but the reference manual is quite rough about some interesting aspects of those and I have a hard time figuring how to achieve my goal.

I am trying to generate 2 different PWM's for modulating bit patterns. Base frequency is the same, only duty cycle differs. I know how to generate these ''stand alone'' on two different pins, but I want to use only one pin that changes its PWM according to the actual bit value.

Bit value 1 would modulate pwm1 and bit value 0 pwm2.

To add some more complexity I'd like to use (somehow) DMA to load the next waveform automatically to the timer without interrupt intervention, so I could let STM32 do this automatically without burdening CPU with high interrupt load.

If I would use some external logic I would connect the two PWM's to a multiplexer and modulate it via SPI with the bit patterns to choose either PWM1 or PWM2.

But is this possible with built-in means of the STM32f0, maybe with help of the comparator ?
6 REPLIES 6
Posted on November 24, 2013 at 18:38

Depends a lot on the frequency of the updates.

You can reprogram the pulse width in the period interrupt (or CCx), you can also trigger DMA transfers to the CCx register. You then need to build a table of modulation values which you could update on HT or TC DMA interrupts.

I've posted DMA driven PWM examples for other STM32 parts.
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dschnell
Associate II
Posted on November 24, 2013 at 18:58

It's a 800 kHz PWM with 25% and 50% duty cycle. It's for modulating WS2811 LED strips. These are a bit sensitive for timing jitters.

I've used SPI/DMA with up to 24MHz on that particular controller successfully. I am optimistic that 800kHz should be doable.

So what you say is that the DMA Buffer has to be prepared according to the correct values of the CCx register. So I'd rather modulate the DMA buffer with the bit values 😉 Double buffering is a good idea. Do you have an example for updating the CCx register via DMA ? Is this a memory to memory DMA with the CCx register as memory destination ?
Posted on November 24, 2013 at 19:50

Not specifically for the F0 parts, but applicable

[DEAD LINK /public/STe2ecommunities/mcu/Lists/STM32Discovery/Flat.aspx?RootFolder=/public/STe2ecommunities/mcu/Lists/STM32Discovery/STM32F4%20PWM%2BDMA%20problem&FolderCTID=0x01200200770978C69A1141439FE559EB459D75800084C20D8867EAD444A5987D47BE638E0F&currentviews=117]https://my.st.com/public/STe2ecommunities/mcu/Lists/STM32Discovery/Flat.aspx?RootFolder=%2Fpublic%2FSTe2ecommunities%2Fmcu%2FLists%2FSTM32Discovery%2FSTM32F4%20PWM%2BDMA%20problem&FolderCTID=0x01200200770978C69A1141439FE559EB459D75800084C20D8867EAD444A5987D47BE638E0F¤tviews=117
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dschnell
Associate II
Posted on November 25, 2013 at 21:59

Thx a ton! I have it now running with TIM17 and a 800kHz PWM via DMA. A ring buffer with intermittent 25%/50% PWM looks great on the logic analyzer.

Still have to implement double buffering and I am a bit undecided about the buffer size I should use. E.g. with 400 elements and double buffering that's 4000 irq/sec.

Do you know what irq frequency the STM32f0 is capable to support or some gut value where not to go ?
Posted on November 25, 2013 at 22:19

Something in the 1 - 10 KHz range should be fine, people tend to get into trouble around 100 KHz, or thinking they can interrupt at 1 MHz

You have to evaluate how many cycles your prep work takes compared to the overhead of the interrupt. Where the saturation point is for your F0, I don't know, using a GPIO in the interrupt to understand how long it takes should give you a good idea where the ceiling is.

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dschnell
Associate II
Posted on November 27, 2013 at 18:43

When a circular buffer DMA is ongoing, how can one stop at the exact position when a few buffer updates have happened ? I.e. can I update the buffer size for the last transaction on the fly and switch circular mode off?