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Beginner programmer...EASY Question...Trying to understand timers and interrupts

w0743380
Associate
Posted on December 20, 2013 at 05:58

Im trying to configure a timer on my STM32F3 discovery board. I want to generate an interrupt at approximately a 128khz rate. My partner claims that the code below would do this but im not understanding how or why??? Can someone explain the significance of each of these lines of code below and how in the world they help achieve the 128khz rate?

Also, my Timer 6 input clock and System Core Clock are at 72Mhz.

 

TIM6->CR1 = 0x0001; 

TIM6->CR2 = 0x0000; 

TIM6->DIER = 0x0001; 

TIM6->PSC = 0x0010; 

TIM6->ARR = 0x0021; 

so far all I know is this...

      

TIM6->CR1 = 0x0001; //set the timer counter configuration register 1 to equal 1…

TIM6->CR2 = 0x0000; //set the timer capture configuration register 2 to equal 0…

TIM6->DIER = 0x0001; //set the timer control register to 1…this enables the update interrupt 

TIM6->PSC = 0x0010; //setting the prescale register to 16…divides the clock source by 16

TIM6->ARR = 0x0021; //Set the timer auto-reload register to 33…

2 REPLIES 2
chen
Associate II
Posted on December 20, 2013 at 14:49

Hi

      

TIM6->CR1 = 0x0001; //set the timer counter configuration register 1 to equal 1…

This line starts the counter counting,

disables AutoPreLoad (does not buffer some registers),

direction =up,

not centre aligned,

allow update event

TIM6->CR2 = 0x0000; //set the timer capture configuration register 2 to equal 0…

THis reg take lots of explaining - Read the manual - ask me anything you do not understand

TIM6->DIER = 0x0001; //set the timer control register to 1…this enables the update interrupt

This line enables the IRQ for update event (when counter reaches the value in ARR)

TIM6->PSC = 0x0010; //setting the prescale register to 16…divides the clock source by 16

TIM6->ARR = 0x0021; //Set the timer auto-reload register to 33…

Posted on December 20, 2013 at 15:41

Comments that just restate what the instruction does aren't at all helpful.

It's divide by 17, not 16, and 34 not 33

(72000000 / (16 + 1)) / (33 + 1)

72000000 / 17 / 34

124567.474 Hz

Closer factors might be 1 and 562 or 1 and 563

72000000 / 562 = 128113.879 Hz

72000000 / 563 = 127886.323 Hz

Prescaler = 1 - 1;

Period = 562- 1; or

Period = 563 -1;

For 128 KHz exactly I might clock the CPU at 64 MHz instead

(64000000 / 1) / 500

Prescaler = 1 - 1;

Period = 500 - 1;

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