cancel
Showing results for 
Search instead for 
Did you mean: 

USART communication between stm32f407 and two stm32f030

sanjib
Associate III
Posted on January 21, 2015 at 09:55

HI ALL

I have written a code for USART communication  full duplex between stm32f407 and stm32f030 and it is working fine as soon as power on reset. The half duplex communication also working fine between two stm32f030 as soon as the power on reset.

BUT IF i connected the three together

The logic is f407 sends some cmd to 1st f030 through full duplex usart, after receiving that the 1st f030 send that data to 2nd f030 , the 2nd f030 processed the receives data and send back the process cmp ack to 1st f030 and 1st f030 sends the same ack to f407...and the loop continues.....

The issue is ,it doesn't happen in power on reset It happens after presseing the reset button of f407 (as f407 is master) for 8 times , always 8 times after that everything works fine but not in the 1st power on reset. I have debugged and I have seen that there is a frame error in the 2nd  f030 when the first packet is received. after 8 times reset packet is received fine(ther is no frame error) I have checked sending the received data of the 2nd f030 to the hyper terminal through the other USART....

Why it is working fine after 8 times reset but not in the first time....Can anybody face this issue. Please help
11 REPLIES 11
sanjib
Associate III
Posted on January 22, 2015 at 06:53

Any body can help

ivani
Associate II
Posted on January 22, 2015 at 08:26

Very little information but it seems like a synchronization issue between chips.

You should consider that the chips will not boot exactly at the same time and each of them may catch some of the incoming messages in the middle.

You should pay more attention in designing the protocol and making it more robust:

- providing some handshake in the communication

- repeating messages with some timeout if response doesn't come

- identifying and cleaning wrong messages

- ability to resynchronize to a correct message
sanjib
Associate III
Posted on January 22, 2015 at 10:37

Thanks for your suggestion Do I need a timer which should start after transmitting is complete and then if I dont received ACK then send the data again...If that so f030(1)am sending 5 byte data to the f030(2) chip at a baud rate of 9600 and if it is received f030(2) sends an ACK SO I am starting the timer in f030(1) after 5 byte transmission . ACK is also 5 byte so therefore I should program timer for how much rime....the baud rate is 9600 in both the cases....Please suggest as I know f030(2) receives the packet which is framed error .

ivani
Associate II
Posted on January 22, 2015 at 10:48

The timer will act as a guard interval, so it should be set to much longer value than the normal communication takes. Say, if normally the response comes in 10ms you may set the timer to repeat the request in 50, or 100ms (it depends on the actual requirements for the task).

Posted on January 22, 2015 at 11:18

[DEAD LINK /public/STe2ecommunities/mcu/Lists/STM32Discovery/Flat.aspx?RootFolder=/public/STe2ecommunities/mcu/Lists/STM32Discovery/stm32f030%20usrt%20surprissing%20issue&FolderCTID=0x01200200770978C69A1141439FE559EB459D75800084C20D8867EAD444A5987D47BE638E0F&currentviews=46]Prior thread on robustness topic

Tips, Buy me a coffee, or three.. PayPal Venmo
Up vote any posts that you find helpful, it shows what's working..
sanjib
Associate III
Posted on January 22, 2015 at 14:41

corect packet is 30 31 5 1 30 this is what it need to be send

I have set the Timer to much longer value than the normal communication takes. I have set it to 4 sec so if the response doesn't comes within 4 sec than it send again. but the issue is for the first time it sends somewhat correct packet like it sends 0 30 31 5 1 30 but the next packet it sends is

236 172 176 096 143 000 063 063 In ASCII it is null after every 4 sec please help why?

0690X0000060MoEQAU.gif

Posted on January 22, 2015 at 18:12

Half duplex systems are likely to show line noise as direction is changed. Got some pull-up on the line?

Going to suggest you think a bit about your protocol, and how you can make it robust and capable of resynching, rather than expecting fixed byte transactions.

Create a simple system to validate the USART communications, and used debug your system.
Tips, Buy me a coffee, or three.. PayPal Venmo
Up vote any posts that you find helpful, it shows what's working..
sanjib
Associate III
Posted on January 23, 2015 at 06:48

The half duplex between two f030 works fine after one reset itself and it doesn't stop. the issue comes when f407 is introduced....The logic I have explain in my first querry. I have pulled up in my software does it required to do in hardware also. please suggest

sanjib
Associate III
Posted on January 24, 2015 at 07:17

please suggest Do I need