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ldrex/strex/stm32f7

AVI-crak
Senior
Posted on January 29, 2017 at 11:44

Command Set exclusive recording / ldrex / strex reading. The program takes off on operations in the field of memory sram1 / 2 (stm32f746).

In cortex_m7 chip there are many options for internal memory (total 320 Kbytes), including:

DTCM-RAM = 0x2000 0000 - 0x2001 0000

SRAM1 = 0x2001 0000 - 0x2004 C000

SRAM2 = 0x2004 C000 - 0x2050 0000

All memory is in linear space. But ldrex / strex teams are working in the field of DTCM-RAM.

My idea of an exclusive read / write operations: the shadow instruction register addresses ldrex / strex must be cleared by reading / writing to the given address of the cortex of the nucleus. Memory Operations in the cortex not the core should not cause an error exclusive read / write. ldrex / strex operations should have no impact outside the core cortex.

But it turns out otherwise.

Question - how to live with it, and what a treat.

#ldrex-strex
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