Problem reading out multiple ADCs by DMA

[patrick_seeboerger]

Posted on April 09, 2016 at 11:08The original post was too long to process during our migration. Please click on the attachment to read the original post.

[Tesla DeLorean]

Posted on April 09, 2016 at 14:24

Seem to be several concepts here not grasped at all well.

Triple mode is one channel each across 3 ADC 4 is not a multiple of 3, 1 channel per ADC, not 9 across 3 (3 x 3) If you goal is to have 4 channels read by a single ADC, please review other posted working examples.

[patrick_seeboerger]

Posted on April 09, 2016 at 15:48

Ok. My Goal is to use Minimum 2 ADCs (ADC1 or ADC2 and ADC3).

The reason for this is that there are no other ports free with Connection to ADC1 or 2. Can you tell me the best way I should choose? Thank you. Best regards, Patrick

[Tesla DeLorean]

Posted on April 09, 2016 at 16:54

List the pins you have to use.

Determine which pins must be sampled in the same instant. Only ADC1+2 will pair, ie ADC2 + 3 won't One ADC can scan 14, or so, channels So if we have // PA.05 ADC12_IN5    // PC.03 ADC123_IN13 // PF.06 ADC3_IN4      // PC.05 ADC12_IN15 You're going to have to use 3 ADC, and you're going to want to do SIX conversions Each ADC will do TWO conversions, it will SCAN, you will supply TWO ranked channels into each ADC. You will need to come up with two place holding channels so the total number of samples is divisible by THREE. You will discard/ignore these values in the array. ADC_InitStructure.ADC_ScanConvMode = ENABLE; // More the ONE conversion .. ADC_InitStructure.ADC_NbrOfConversion = 2; // TWO conversion per ADC .. ADC_RegularChannelConfig(ADC1, ADC_Channel_5,  1, ADC_SampleTime_84Cycles);    // PA5 Rank#1 ADC_RegularChannelConfig(ADC1, ADC_Channel_15,  2, ADC_SampleTime_84Cycles);    // PC5 Rank#2 .. Then 2 ranked channels for ADC2 Then 2 ranked channels for ADC3 __IO uint32_t uhADCTripleConvertedValue[3]; or __IO uint16_t uhADCTripleConvertedValue[6]; // Six 16-bit half words   DMA_InitStructure.DMA_BufferSize = 3; // 3x 32-bit words (eqv 6x 16-bit half-words)   DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Word; // 32-bit   DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Word;  There might be other adjustments, but this will start to address the significant flaws we had before.

[re.wolff9]

Posted on April 10, 2016 at 12:40

• Determine which pins must be sampled in the same instant.

I don't think that is what he needs. I think the intention is just to sample four different signals, and he can't use just one ADC because of the pins to which things are connected. 

[patrick_seeboerger]

Posted on June 19, 2016 at 11:21 The original post was too long to process during our migration. Please click on the provided URL to read the original post. https://st--c.eu10.content.force.com/sfc/dist/version/download/?oid=00Db0000000YtG6&ids=0680X000006I6bA&d=%2Fa%2F0X0000000brT%2FHUVVEjqP54awNJ1GHkZYoeNcKMavt005wFMXG6qBjQY&asPdf=false

[patrick_seeboerger]

Posted on June 19, 2016 at 11:31

Hallo Roger,

you are right. With the proposed Code from Clive it is not possible to read out four different ports. With the proposed Code I only read out the following ports: PA5, PC4, PF6 I have added the ADC_config Code to the attached files for better reading. Do you know any simple way to read out 4 or 6 different ports by the DMA similar to the existing Code? Thanks in advance. Best regards, Patrick ________________ Attachments : ADC_Config.txt : https://st--c.eu10.content.force.com/sfc/dist/version/download/?oid=00Db0000000YtG6&ids=0680X000006I14Q&d=%2Fa%2F0X0000000bhq%2FW9CytIYyQ1Jn4gNsn7ysB3vMkKDQsLuw6OL5UJ9FVtQ&asPdf=false

[Tesla DeLorean]

Posted on June 20, 2016 at 01:12

The ''Format Source Code'' tool is the Paintbrush [< >] Icon.

I'm pretty sure it is capable of doing all 6 channels, I'd have to rack up the code, and confirm the DMA settings,

__IO uint16_t uhADCTripleConvertedValue[6]; // Six 16-bit half words
[0] PA5 ADC12_IN5 ADC1
[1] PA7 ADC12_IN7 ADC2
[2] PF6 ADC3_IN4 ADC3
[3] PC5 ADC12_IN15 ADC1
[4] PC4 ADC12_IN14 ADC2
[5] PC3 ADC123_IN13 ADC3
/* ADC1 regular channel 5 configuration */
ADC_RegularChannelConfig(ADC1, ADC_Channel_5, 1, ADC_SampleTime_84Cycles); // PA5 [0]
/* ADC1 regular channel 15 configuration */
ADC_RegularChannelConfig(ADC1, ADC_Channel_15, 2, ADC_SampleTime_84Cycles); // PC5 [3]
/* ADC2 regular channel 7 configuration */
ADC_RegularChannelConfig(ADC2, ADC_Channel_7, 1, ADC_SampleTime_84Cycles); // PA7 [1]
/* ADC2 regular channel 14 configuration */
ADC_RegularChannelConfig(ADC2, ADC_Channel_14, 2, ADC_SampleTime_84Cycles); // PC4 [4]
/* ADC3 regular channel 4 configuration */
ADC_RegularChannelConfig(ADC3, ADC_Channel_4, 1, ADC_SampleTime_84Cycles); // PF6 [2]
/* ADC3 regular channel 13 configuration */
ADC_RegularChannelConfig(ADC3, ADC_Channel_13, 2, ADC_SampleTime_84Cycles); // PC3 [5]