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Confusion with DMA

ebommer
Associate II
Posted on April 25, 2014 at 22:00

I am using an STM32F050G6 processor and using DMA to read 4 AD channels.  I am a little confused on how to control the order of the DMA reads of the ADC.

Currently my code is set up to read channels 6,7,8,9 (PA6,7 PB0,1).  In the array being copied from the DMA the order is channel 9,6,7,8.  In the STM32F10x standard libraries there was the option to set the channel number which seemed to align with the order being copied into the array “ADC_RegularChannelConfig'', for the F0 libraries I don't see that option�?

ADC_ChannelConfig�?(which I could be missing).

So I guess I am looking for a way to predict the order of the data being copied from the DMA. 

Thanks for any help.

#define ADC1_DR_Address                0x40012440

__IO uint16_t RegularConvData_Tab[4];

ADC_InitTypeDef     ADC_InitStructure;

  DMA_InitTypeDef     DMA_InitStructure;

   /* ADC1 DeInit */ 

  ADC_DeInit(ADC1);

    /* ADC1 Periph clock enable */

  RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC1, ENABLE);

    /* DMA1 clock enable */

  RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1 , ENABLE);

    /* DMA1 Channel1 Config */

  DMA_DeInit(DMA1_Channel1);

  DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)ADC1_DR_Address;

  DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)RegularConvData_Tab;

  DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralSRC;

  DMA_InitStructure.DMA_BufferSize = 4;

  DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;

  DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;

  DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord;

  DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord;

  DMA_InitStructure.DMA_Mode = DMA_Mode_Circular;

  DMA_InitStructure.DMA_Priority = DMA_Priority_High;

  DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;

  DMA_Init(DMA1_Channel1, &DMA_InitStructure);

    /* DMA1 Channel1 enable */

  DMA_Cmd(DMA1_Channel1, ENABLE);

  /* ADC DMA request in circular mode */

  ADC_DMARequestModeConfig(ADC1, ADC_DMAMode_Circular);

    /* Enable ADC_DMA */

  ADC_DMACmd(ADC1, ENABLE); 

    /* Initialize ADC structure */

  ADC_StructInit(&ADC_InitStructure);

   /* Configure the ADC1 in continous mode withe a resolutuion equal to 12 bits  */

  ADC_InitStructure.ADC_Resolution = ADC_Resolution_12b;

  ADC_InitStructure.ADC_ContinuousConvMode = ENABLE;

  ADC_InitStructure.ADC_ExternalTrigConvEdge = ADC_ExternalTrigConvEdge_None;

  ADC_InitStructure.ADC_DataAlign = ADC_DataAlign_Right;

  ADC_InitStructure.ADC_ScanDirection = ADC_ScanDirection_Upward;

  ADC_Init(ADC1, &ADC_InitStructure);

   /* Convert the ADC1 channel 6  with 55.5 Cycles as sampling time */

  ADC_ChannelConfig(ADC1, ADC_Channel_6 , ADC_SampleTime_55_5Cycles); 

   /* Convert the ADC1  channel 7 with 55.5 Cycles as sampling time */

  ADC_ChannelConfig(ADC1, ADC_Channel_7 , ADC_SampleTime_55_5Cycles);

   /* Convert the ADC1  channel 8  with 55.5 Cycles as sampling time */

  ADC_ChannelConfig(ADC1, ADC_Channel_8 , ADC_SampleTime_55_5Cycles); 

   /* Convert the ADC1  channel 9 with 55.5 Cycles as sampling time */

  ADC_ChannelConfig(ADC1, ADC_Channel_9 , ADC_SampleTime_55_5Cycles);  

  /* ADC Calibration */

  ADC_GetCalibrationFactor(ADC1);

   /* Enable ADC1 */

  ADC_Cmd(ADC1, ENABLE);    

   /* Wait the ADCEN falg */

  while(!ADC_GetFlagStatus(ADC1, ADC_FLAG_ADEN));

   /* ADC1 regular Software Start Conv */

  ADC_StartOfConversion(ADC1);

2 REPLIES 2
ebommer
Associate II
Posted on April 25, 2014 at 22:21

I think I moved a step forward.  I found a posting talking about the timing of the DMA and ADC enable.

So I moved the DMA enable, so now 6,7,8,9 equal 0,1,2,3

    /* Enable ADC_DMA */

  ADC_DMACmd(ADC1, ENABLE);  

  

  /* Enable ADC1 */

  ADC_Cmd(ADC1, ENABLE);     

I a still a little worried that the order of the channels does not guarantee the order of the data being moved.

Posted on April 26, 2014 at 06:16

Well the DMA doesn't control the order, that's the job of the ADC

If I understand the F0, it's in numerical order of channel# (Forward), or the the reverse (Backward)
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