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DMA_FLAG_FEIF0 value incorrect in stm32f4xx_dma.h?

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Associate II
Posted on July 12, 2014 at 15:59

While trying to track down my DMA2 stalling problem, I've tried to enable interrupts for things other than completion.

As a result, I notice that these two definitions:

</p>

 

#define

 

 

</b>

 

 

DMA_FLAG_FEIF0 ((uint32_t)0x10800001)

 

#define

DMA_FLAG_DMEIF0 ((uint32_t)0x10800004)

 

 

set a bit that's listed as reserved in LISR for DMA2.

 

 

Surely the 8's are erroneous, and should be zeroes, looking at the documentation of the register.

 

 

#define

DMA_FLAG_FEIF0 ((uint32_t)0x10000001)

4 REPLIES 4
Posted on July 12, 2014 at 16:09

Does the library actually write these values to the register, or is it a more complicated encoding that the library is processing?

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Associate II
Posted on July 12, 2014 at 16:59

Having examined the code in detail, it looks like the library never uses these flags, and then masks out the reserved bits, so maybe they were used for testing the masking, and never pruned.

Posted on July 12, 2014 at 17:32

/**
* @brief Checks whether the specified DMAy Streamx flag is set or not.
* @param DMAy_Streamx: where y can be 1 or 2 to select the DMA and x can be 0
* to 7 to select the DMA Stream.
* @param DMA_FLAG: specifies the flag to check.
* This parameter can be one of the following values:
* @arg DMA_FLAG_TCIFx: Streamx transfer complete flag
* @arg DMA_FLAG_HTIFx: Streamx half transfer complete flag
* @arg DMA_FLAG_TEIFx: Streamx transfer error flag
* @arg DMA_FLAG_DMEIFx: Streamx direct mode error flag
* @arg DMA_FLAG_FEIFx: Streamx FIFO error flag
* Where x can be 0 to 7 to select the DMA Stream.
* @retval The new state of DMA_FLAG (SET or RESET).
*/
FlagStatus DMA_GetFlagStatus(DMA_Stream_TypeDef* DMAy_Streamx, uint32_t DMA_FLAG)
{
FlagStatus bitstatus = RESET;
DMA_TypeDef* DMAy;
uint32_t tmpreg = 0;
/* Check the parameters */
assert_param(IS_DMA_ALL_PERIPH(DMAy_Streamx));
assert_param(IS_DMA_GET_FLAG(DMA_FLAG));
/* Determine the DMA to which belongs the stream */
if (DMAy_Streamx < 
DMA2_Stream0
)
{
/* DMAy_Streamx belongs to DMA1 */
DMAy
= 
DMA1
;
}
else
{
/* DMAy_Streamx belongs to DMA2 */
DMAy
= 
DMA2
;
}
/* Check if the flag is in HISR or LISR */
if ((DMA_FLAG & HIGH_ISR_MASK) != (uint32_t)RESET)
{
/* Get DMAy HISR register value */
tmpreg
= 
DMAy
->HISR;
}
else
{
/* Get DMAy LISR register value */
tmpreg = DMAy->LISR;
}
/* Mask the reserved bits */
tmpreg &= (uint32_t)RESERVED_MASK;
/* Check the status of the specified DMA flag */
if ((tmpreg & DMA_FLAG) != (uint32_t)RESET)
{
/* DMA_FLAG is set */
bitstatus = SET;
}
else
{
/* DMA_FLAG is reset */
bitstatus = RESET;
}
/* Return the DMA_FLAG status */
return bitstatus;
}

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Posted on July 12, 2014 at 17:38

While the bit you are complaining about does appear extraneous, the most plausible reason for them being there is to differentiate the encoding from others, and permit the assert_param() to catch bogus values.

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