2015-05-24 07:24 AM
Hello
For some purpose i need to run DCMI interface with maximum frequency(it is 54MHz, right?), i provided pixclk pin with 56MHz clock(sysclock divided by 3 coming out of mco2 pin) but it seems that overrun occurs on DCMI fifo.What is the maximum applicable frequency of this interface and how can it be generated?Thanks.2015-05-24 09:51 AM
2015-05-24 10:17 AM
What would be the I2S PLL configuration?
2015-05-24 12:27 PM
2015-05-24 07:19 PM
I use stm32f4discovery, it has on board 8MHz crystal.
According to page 226 of RM0090, it is recommended to set PLLM to 2 (8MHz crystal assumption) to minimize PLL jitter and according to page 264, PLLI2SR can't be larger than 7, so i think below is some proper configuration:PLLI2SN = 324PLLI2SR = 6This gives 108MHz clock for I2S and applying a division by 2, will give 54MHz on mco2 pin.