USB HS: RM0090 issues

schauer · ‎2014-04-15

Posted on April 15, 2014 at 17:05

According to the usermanual (UM) and datasheet, the STM32F4 has 6 in and 6 out endpoints in Highspeed (ULPI) Mode.

When reading the UM and having a closer look at the register tables I found out that the registers DOEPCTLx and DIEPTSIZx are only specified for x=1..3, but they should be specified for x=1..5.

An other interesting aspect is, that several registers DIEPINTx, DOEPINTx and DIEPCTLx are specified for x=0..7 and DIEPTXFx is specified for x=1..7. So it seems like the STM32F4 has 8 endpoints, but only 4 really complete ones as some registers exist for up to 4 endpoints and others for up to 8 endpoints.

Please clarify what I could expect from a STM32F42x device and how many endpoints are really available. If there is already a clarification in the UM, which I have overseen, please point me into the right direction.

schauer · ‎2014-05-15

Posted on May 15, 2014 at 15:15

Additional questions:

a) Where is DOEPDMA0/DIEPDMA0? according to RM0090 those registers do not exist - but at least DOEPDMA0 is described in section 35.13.6 of the same document.

b) How does the operational model (RM0090, Section 35.13.7) work if DMA is used? Is it required in that case to pop status from the FIFO?

c) What are the registers DOEPDMAB/DIEPDMAB?

schauer · ‎2014-05-20

Posted on May 20, 2014 at 11:07

DIEPCTL0, according to the user manual (v6, page 1434ff.) has a field MPSIZ that is described as the ''Maximum Packet Size'' in bytes.

Writing to the bit field behaves differently, as only the lowest two bits are recognized.

I assume that the register behaves like DOEPCTL0 where MPSIZ has 4 specified values (64, 32, 16 and 8 bytes). Is that correct?

Anyway, I expect a processor manual to be at least correct. It is distracting to permanently run into situations where the only documentation one have is at least misleading.

PS: The first line in the register description to DIEPCTLx (x=0..7) says that EP0 is not covered by the description - but there is no (other) description of that register. So either the first line is wrong or the title.

waclawek.jan · ‎2014-05-21

Posted on May 21, 2014 at 09:17

I am relieving my frustration from inadequate documentation partially by writing up the errors.

https://my.st.com/public/STe2ecommunities/mcu/Lists/cortex_mx_stm32/Flat.aspx?RootFolder=https%3a%2f%2fmy.st.com%2fpublic%2fSTe2ecommunities%2fmcu%2fLists%2fcortex_mx_stm32%2fDocumentation%20improvement%20suggestions&FolderCTID=0x01200200770978C69A1141439FE559EB459D7580009C4E14902C3CDE46A77F0FFD0650...

Sadly I don't have time&energy to update it for the newest version of UM these days.

JW

schauer · ‎2014-05-21

Posted on May 21, 2014 at 10:19

Thanks a lot for the very valuable link! Unfortunately it seems that ST is not commenting on that. This is at least frustrating.

Maybe we should collect those fails in a Wiki?

waclawek.jan · ‎2014-05-21

Posted on May 21, 2014 at 11:36

Maybe, but the plain textfile is the maximum complexity I am willing to cope with at the moment for this purpose... 😉

JW