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NUCLEOL476RG read battery level using ADC.

stm32f4
Associate II
Posted on May 28, 2018 at 17:21

Hello ST All.

I have a NUCLEOL476RG and i have some troubles trying to read a battery level using ADC.

I made a voltage divider partitor to get 3.3V starting from 14.1V.

1)  using 162K resistor + 50K resistor the adc read 2.9v

2) using 68.8k + 20.78k the adc read 2.6v.

Using multimeter on partitor in both read 3.20v .

If i read 3.3 from Nucleo (CN7  pin 2 or 4) adc read correctly.

please, Anyone may helm me with hints?

Regards,

Carmelo

1 ACCEPTED SOLUTION

Accepted Solutions
S.Ma
Principal
Posted on May 28, 2018 at 18:04

ADC input is high impedence. Then ADC sample the voltage by connecting a RC to the ADC input pin for a while, then disconnecting the input pin, and convert. When connecting the RC, the cap maybe discharged...

The input impedence should be small (ideally a supply voltage), and here it is very resistive, the RC curve slows down and is cut before reaching the asymptotic ideal voltage.

==> If this situation is correct, increasing the sample time to maximum will yield a value closer to the expected one.

==> If the required sample time shall be higher than possible, you could stop the ADC clock during sampling phase to 'freeze the time'.

==> Alternatively, put a decoupling cap to ground (10uF?) at the ADC sampling point. Battery level changes slowly so the response time of the divider maynot be critical...

View solution in original post

3 REPLIES 3
S.Ma
Principal
Posted on May 28, 2018 at 18:04

ADC input is high impedence. Then ADC sample the voltage by connecting a RC to the ADC input pin for a while, then disconnecting the input pin, and convert. When connecting the RC, the cap maybe discharged...

The input impedence should be small (ideally a supply voltage), and here it is very resistive, the RC curve slows down and is cut before reaching the asymptotic ideal voltage.

==> If this situation is correct, increasing the sample time to maximum will yield a value closer to the expected one.

==> If the required sample time shall be higher than possible, you could stop the ADC clock during sampling phase to 'freeze the time'.

==> Alternatively, put a decoupling cap to ground (10uF?) at the ADC sampling point. Battery level changes slowly so the response time of the divider maynot be critical...

Posted on May 29, 2018 at 02:36

decoupling cap should be closer to 1uF or even 0.1uF,

your problem is the high impedance.

if you require a fast response, then you should use an external OpAmp to drive the pin with low impedance.

this will give you a much faster changing voltage on the pin from the source and a rapid read capability.

Posted on May 29, 2018 at 08:54

Thanks a lot.

i, as you suggested , increase sample time