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STM32F205 TIM8 advanced mode problem

Jeck7778
Associate II
Posted on November 09, 2017 at 08:07

I have a problem on negative output when use the TIM8 with 6 complementary output (same on TIM1).

the problem is the polarity setting on Negative channel not work if not enable one of the output (positive or negative).

I have set the OSSR bit for have the contro without the PWM.

The same code on STM32F103 work perfectly.

PWM outPWM1PWM1NPEM2PWM2NPWM3PWM3N

CCER

register

PWM1EPWM1PPWM1NEPWM1NPPWM2EPWM2PPWM2NEPWM2NPPWM3EPWM3PPWM3NEPWM3NP

100100010000

ExpectedPWMHLHLL

On realityPWMHLLLL

the initialization code of the timer is the seguent:

#define _TIM_HALL   TIM4

#define _TIM_MTR    TIM8

/* select Commutation event through TIM4 */

    TIM_SelectInputTrigger(_TIM_MTR, TIM_TS_ITR2);

    TIM_SelectCOM(_TIM_MTR,ENABLE);

    /* Time Base configuration */

    TIM_TimeBaseStructInit(&TIM_TimeBaseStrct);

    TIM_TimeBaseStrct.TIM_Prescaler         = 3;

    TIM_TimeBaseStrct.TIM_CounterMode         = TIM_CounterMode_Up;

    TIM_TimeBaseStrct.TIM_Period             = 1024;

    TIM_TimeBaseStrct.TIM_ClockDivision     = 0;

    TIM_TimeBaseStrct.TIM_RepetitionCounter = 0;

    TIM_TimeBaseInit(_TIM_MTR, &TIM_TimeBaseStrct);

    /* Channel 1, 2,3 and 4 Configuration in PWM mode */

    TIM_OCStructInit(&TIM_OCInitStrct);

    TIM_OCInitStrct.TIM_OCMode             = TIM_OCMode_PWM1;

    TIM_OCInitStrct.TIM_OutputState     = TIM_OutputState_Disable;

    TIM_OCInitStrct.TIM_OutputNState     = TIM_OutputNState_Disable;

    TIM_OCInitStrct.TIM_Pulse             = 0;

    TIM_OCInitStrct.TIM_OCPolarity         = TIM_OCPolarity_Low;

    TIM_OCInitStrct.TIM_OCNPolarity     = TIM_OCNPolarity_Low;

    TIM_OCInitStrct.TIM_OCIdleState     = TIM_OCIdleState_Reset;

    TIM_OCInitStrct.TIM_OCNIdleState     = TIM_OCNIdleState_Reset;

    TIM_OC1Init(_TIM_MTR, &TIM_OCInitStrct);

    TIM_OC2Init(_TIM_MTR, &TIM_OCInitStrct);

    TIM_OC3Init(_TIM_MTR, &TIM_OCInitStrct);

    /* Setting for the injected ADC synchronization */

    TIM_OCStructInit(&TIM_OCInitStrct);

    TIM_OCInitStrct.TIM_OCMode             = TIM_OCMode_PWM1;

    TIM_OCInitStrct.TIM_OutputState     = TIM_OutputState_Disable;

    TIM_OCInitStrct.TIM_OCPolarity         = TIM_OCPolarity_Low;

    TIM_OCInitStrct.TIM_Pulse             = 10;

    TIM_OC4Init(_TIM_MTR, &TIM_OCInitStrct);

    /* Automatic Output enable, Break, dead time and lock configuration*/

    TIM_BDTRStructInit(&TIM_BDTRInitStrct);

    TIM_BDTRInitStrct.TIM_OSSRState         = TIM_OSSRState_Enable;

    TIM_BDTRInitStrct.TIM_OSSIState         = TIM_OSSIState_Enable;

    TIM_BDTRInitStrct.TIM_LOCKLevel         = TIM_LOCKLevel_OFF;

    TIM_BDTRInitStrct.TIM_DeadTime             = 0;

    TIM_BDTRInitStrct.TIM_Break             = TIM_Break_Disable;

    TIM_BDTRInitStrct.TIM_AutomaticOutput     = TIM_AutomaticOutput_Enable;

    TIM_BDTRConfig(_TIM_MTR, &TIM_BDTRInitStrct);

    TIM_CCPreloadControl(_TIM_MTR, ENABLE);

    /* _TIM_MTR interrupt enable */

    TIM_ITConfig(_TIM_MTR, TIM_IT_COM, ENABLE);

    NVIC_InitStr.NVIC_IRQChannel                     = TIM8_TRG_COM_TIM14_IRQn;

    NVIC_InitStr.NVIC_IRQChannelPreemptionPriority     = 0;

    NVIC_InitStr.NVIC_IRQChannelSubPriority            = 1;

    NVIC_InitStr.NVIC_IRQChannelCmd                 = ENABLE;

    NVIC_Init(&NVIC_InitStr);

    /* _TIM_MTR counter enable */

    TIM_Cmd(_TIM_MTR, ENABLE);

    /* Main Output Enable */

    TIM_CtrlPWMOutputs(_TIM_MTR, ENABLE);

    // HallSensor is now configured, if BLDC Timer is also configured

    // after enabling timer 4

    // the motor will start after next overflow of the hall timer because

    // this generates the first startup motor commutation event

    TIM_Cmd(_TIM_HALL, ENABLE);

on main for testing i used:    _TIM_MTR->CCR1 = 300;

    _TIM_MTR->CCR2 = 300;

    _TIM_MTR->CCR3 = 300;

    _TIM_MTR->CCER = TIM_CCER_CC1E | TIM_CCER_CC1NP | TIM_CCER_CC2NP;

    TIM_GenerateEvent(_TIM_MTR,TIM_EventSource_COM);

The expected output on STM32f205 not work.

On the manual, the timer periphery look like the same of STM32F103, but on STM32F205 not work.

Any one can help me?

Thanks.
2 REPLIES 2
Posted on November 11, 2017 at 00:40

If both CCxE and CCxNE bits are zero, regardless of OSSR, the respective pins are not driven by the timer, i.e. they are Hi-Z or pulled up-down according to GPIO_PUPDR setting. However, note that these bits may be preloaded, see CCPC bit.

Read thoroughly the advanced timer chapter, concentrate on description of CCER and BDTR registers and their bits, and the Output control bits for complementary OCx and OCxN channels with break feature table.

JW

175032CGIL2