Cortex M3 bit banding

[pic_micro]

Posted on November 23, 2014 at 13:35

Dear All,

 I red the ARM reference manuals regarding  the ''bit banding'' to understand the operation.   I do not understand how it's overcome the RMW (Read modify write )behaviorlease adviceThanks in advance

[Tesla DeLorean]

Posted on November 23, 2014 at 15:24

A RMW at a software level on a load store architecture is going to take at least 3 instructions. Bit banding uses an alternate memory space mapping to perform the action at a hardware level. A write to one bit causes the hardware to load an internal register, modify the bit requested, and then store it back. The memory bus is locked during this interact, which isn't the case when using the equivalent software sequence.

On should use caution with bit-banding on the peripheral space, as registers here are not memory and can change state during the interaction. TIM->SR being a particular hazard.

[pic_micro]

Posted on November 25, 2014 at 18:35

Dear Sir,

Now I have some idea about bit banding operation and further understand please  advise how can I recognize that the following source code is operation in the bit banding methodGPIO_ResetBits (GPIOC,GPIO_Pin_8);

[Tesla DeLorean]

Posted on November 25, 2014 at 18:46

Pretty sure it doesn't, look at the underlying source in the library.

For peripherals normally in the 0x40000000 region, the bit-banding window would be at 0x42000000

[waclawek.jan]

Posted on November 25, 2014 at 18:47

> how can I recognize that the following source code is operation in the bit banding method

>

> GPIO_ResetBits (GPIOC,GPIO_Pin_8); Study the source of GPIO_ResetBits() function. JW

[pic_micro]

Posted on November 29, 2014 at 04:42I think still i don't understand the bit banding , Please explain using this codeI mean. I want to change the PORTC bit 0 using bit banding. Please give me some example codeGPIO_ResetBits (GPIOC,GPIO_Pin_8);

[Tesla DeLorean]

Posted on November 29, 2014 at 15:14

/**
* @brief Clears the selected data port bits.
* @note This functions uses GPIOx_BSRR register to allow atomic read/modify
* accesses. In this way, there is no risk of an IRQ occurring between
* the read and the modify access.
* @param GPIOx: where x can be (A..I) to select the GPIO peripheral.
* @param GPIO_Pin: specifies the port bits to be written.
* This parameter can be any combination of GPIO_Pin_x where x can be (0..15).
* @retval None
*/
void GPIO_ResetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
{
/* Check the parameters */
assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
assert_param(IS_GPIO_PIN(GPIO_Pin));
GPIOx->BSRRH = GPIO_Pin;
}

It's NOT USING BIT-BANDING, the GPIO peripheral has it's own registers that can set/reset bits with a single write. To use bit-banding you assess the bit address space of GPIOx->ODR causing it to do a read-modify-write, which is significantly less efficient.

unsigned long *p = (unsigned long *)(PERIPH_BB_BASE + (((unsigned char *)&GPIOC->ODR - PERIPH_BASE)*32) + 0);
*p = 0; // Clear PC0
*p = 1; // Set PC0