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STM32F407 DMA stream x FIFO control register (DMA_SxFCR) default value

Posted on July 31, 2015 at 13:38

As written in Ref.Man.

 DMA stream x FIFO control register (DMA_SxFCR) (x = 0..7)

 

Address offset: 0x24 + 0x24 � stream number

 

Reset value: 0x0000 0021

It is true only for DMA1 streams, but for DMA2 reset value is 0x0.

#dma #error
1 REPLY 1
Amel NASRI
ST Employee
Posted on August 03, 2015 at 18:02

Hi kyb,

It seems that DMA1 clock is enabled in your case. If you enable DMA2 clock, you will see that reset value for DMA_SxFCR is 0x00000021.

-Mayla-

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