STM32F4 - trigger digital output based on ADC - minimizing delays

[paul2]

Posted on July 08, 2014 at 09:30

Hi,

I’m trying to minimize control loop delays. Based on a certain analog value (adjustable threshold) a digital output is triggered. Reading ADC values is done by using DMA, digital outputs are driven without DMA.

Results measured by scoop: minimum delay ~300 μs, variation ~90 μs (min

300 μs,

max

390 μs

) Does anybody have some tips/tricks/best practices minimizing ADC-DO control loop delays?

Thanks.

[chen]

Posted on July 08, 2014 at 10:26

Hi

''

I’m trying to minimize control loop delays. Based on a certain analog value (adjustable threshold) a digital output is triggered. Reading ADC values is done by using DMA, digital outputs are driven without DMA.

'' ''

Does anybody have some tips/tricks/best practices minimizing ADC-DO control loop delays?

'' Not sure what you mean by 'ADC control loop' ?? Try looking at the 'Analogue Watchdog' feature of the ADC. It is basically 2 threshold values which can trigger an IRQ

[frankmeyer9]

Posted on July 08, 2014 at 11:21

Why not using a discrete comparator, or a stm32f3 with integrated comparators ?

That would remove much software-induced delays from the loop. For better suggestions, you might perhaps reveal more details about your application.

[Tesla DeLorean]

Posted on July 08, 2014 at 13:22

A singular ADC value, how frequently? Perhaps you could avoid DMA, or use an alternate ADCx unit, and use the EOC interrupt to read/process the threshold