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SPC56EL60 using FMPLL as system clock

Patriks
Senior
Posted on August 27, 2014 at 11:25

Hello,

I tried to use the FMPLL as system clock, but I get a behaviour which I did not expect. As software basis, I used the test application for the SPC56xL discovery board. When I understand the clock configuration in the right way, this project runs with the 16MHz internal RC. I found the configuration in the file hal_lld.h, all modes are using the internal RC for example here:

/**

* @brief DRUN mode settings.

*/

#if !defined(SPC5_ME_DRUN_MC_BITS) || defined(__DOXYGEN__)

#define SPC5_ME_DRUN_MC_BITS (SPC5_ME_MC_SYSCLK_IRC | \

SPC5_ME_MC_IRCON | \

SPC5_ME_MC_XOSC0ON | \

SPC5_ME_MC_PLL0ON | \

SPC5_ME_MC_PLL1ON | \

SPC5_ME_MC_FLAON_NORMAL | \

SPC5_ME_MC_MVRON)

#endif

/**

* @brief RUN0 mode settings.

*/

#if !defined(SPC5_ME_RUN0_MC_BITS) || defined(__DOXYGEN__)

#define SPC5_ME_RUN0_MC_BITS (SPC5_ME_MC_SYSCLK_IRC | \

SPC5_ME_MC_IRCON | \

SPC5_ME_MC_XOSC0ON | \

SPC5_ME_MC_PLL0ON | \

SPC5_ME_MC_PLL1ON | \

SPC5_ME_MC_FLAON_NORMAL | \

SPC5_ME_MC_MVRON)

#endif

In the first step, I changed the SPC5_ME_MC_IRCON to SPC5_ME_MC_XOSC which worked. Looking at the ME_GS register with the debugger shows me, that the S_SYSCLK has the value 0b0010 for XOSC. But when I am trying to use the FMPLL, this register still shows me that the controller uses the internal RC. How can I activate and use the FMPLL as system clock?

Next question is, that I had to comment the while loop within this function in the file hal_lld.c:

bool_t halSPCSetRunMode(spc5_runmode_t mode) {

/* Clearing status register bits I_IMODE(4) and I_IMTC(1).*/

ME.IS.R = 5;

/* Starts a transition process.*/

ME.MCTL.R = SPC5_ME_MCTL_MODE(mode) | SPC5_ME_MCTL_KEY;

ME.MCTL.R = SPC5_ME_MCTL_MODE(mode) | SPC5_ME_MCTL_KEY_INV;

return OSAL_SUCCESS;

}

/* Waits for the mode switch or an error condition.*/

/* while (TRUE) {

uint32_t r = ME.IS.R;

if (r & 1)

return OSAL_SUCCESS;

if (r & 4)

return OSAL_FAILED;

}*/

The reason was, that I have a self designed controller board with the SPC56EL60. I tried the same software as already worked on the discovery board, but it did not work. It seems, that the mode switch is never completed, because the controller stays in this while loop forever. After uncommenting the while loop, I am now able to run the program with either the internal RC or the external oscillator (40Mhz, as on the discovery board). What could be the reason for that?

Hope somebody can help me or give me a good hint how to find the answers to my questions.

Best regards,

Patrik

1 ACCEPTED SOLUTION

Accepted Solutions
Patriks
Senior
Posted on September 02, 2014 at 13:25

Hello Giovanni,

Thank you for your help, it was a hardware issue. There was something wrong with the external wiring of the VDD_LV_PLL0_PLL pin. In case of a mode switch, the PLL was not able to provide a stable clock signal. After changing the layout, the software works as expected and tested on the demo board.

Best regards,

Patrik  

View solution in original post

4 REPLIES 4
Patriks
Senior
Posted on August 27, 2014 at 13:37

Hi,

Studying the reference manual and using the debugger points me a possible reason for my problem. When I understand the mode switching procedure correctly, then the mode transition is finished when every clock source is detected as stable. In my case, the register ME_GS shows me, that the System PLL, Secondary PLL and Secondary system clock source are not stable. Furthermore, the bits SCSRC_SC and SYSCLK_SW in the ME_DMTS register show me that a state change is taking place and a system clock source switching is pending.

Could this be the result of an hardware error?

Best regards,

Patrik

Posted on August 29, 2014 at 12:32

Hi,

Most likely an HW problem, the FMPLL has to work within certain parameters, see the DataSheet for details. Make sure that all frequencies are within limits.

The demos provided with SPC5Studio already use the FMPLL as clock source and have correct settings.

One common error is to try to port an application to a board with a different xtal frequency without changing the PLL input divider, the result is the PLL unable to stabilize because the VCO is forced to work outside its limits.

The steps required when porting an application to a new board are:

1) Duplicate a demo application (crtl-c, ctrl-v in the project explorer, it prompts for a new name).

2) Do the settings in the board component (xtal frequency and I/Os).

3) Change the initialization settings in the drivers component, if some frequency is out of bounds you get compile-time errors).

4) Done, you may have to change LED names in the demo main().

Giovanni

Posted on August 29, 2014 at 12:34

Just another note.

The CPU staying in that loop may mean that your external oscillator or xtal is not starting properly, something to check.

Giovanni
Patriks
Senior
Posted on September 02, 2014 at 13:25

Hello Giovanni,

Thank you for your help, it was a hardware issue. There was something wrong with the external wiring of the VDD_LV_PLL0_PLL pin. In case of a mode switch, the PLL was not able to provide a stable clock signal. After changing the layout, the software works as expected and tested on the demo board.

Best regards,

Patrik