Simple Question on Ethernet Boundary Addresses

[wjthomas]

Posted on August 18, 2014 at 08:50

In the STM32F407xx Datasheet (Doc ID 022152 Rev 4) Table 10 ''STM32F40x register boundary addresses'', there are 5 base addresses listed for the Peripheral ETHERNET MAC.

How do these base addresses correspond to the Ethernet register maps listed in the RM0090 Reference Manual (Doc ID 18909 Rev 7) Table 194 ''Ethernet register map and reset values''. In other words what base address in Table 10 do I use to map the Ethernet registers in Table 194? Bill

[wjthomas]

Posted on August 18, 2014 at 09:12 Got Em!

#define ETH_BASE              (AHB1PERIPH_BASE + 0x8000)

#define ETH_MAC_BASE          (ETH_BASE) #define ETH_MMC_BASE          (ETH_BASE + 0x0100) #define ETH_PTP_BASE          (ETH_BASE + 0x0700) #define ETH_DMA_BASE          (ETH_BASE + 0x1000) Thanks for the help!

[waclawek.jan]

Posted on August 18, 2014 at 09:23

If you look closer, Tab.10 in datasheet (which duplicates Tab.1 of RM0090) describes in fact a single contiguous memory range 0x40028000-0x400293FF. Thus, all ETH registers offsets are to be read as offset from 0x40028000.

My guess is, that the 'F4xx address decoder is designed in 0x400 bytes' chunks, and this might be the result of some mindless ''translation'' from the chips' actual HDL design files. Yes, the quality of STM32 documentation is poor. JW

[waclawek.jan]

Posted on August 18, 2014 at 09:27

Well, these lead to even more confusion, as these ''base addresses'' are nowhere used... 😉

Yes, the ETH controller might be built as modular, but once the register addresses in the datasheet are given as offset from a single base address (and ETH_TypeDef follows that closely), there's no need for these four addresses and only add to the confusion. JW > #define ETH_MAC_BASE          (ETH_BASE)

> #define ETH_MMC_BASE          (ETH_BASE + 0x0100)

> #define ETH_PTP_BASE          (ETH_BASE + 0x0700) > #define ETH_DMA_BASE          (ETH_BASE + 0x1000)