STM32F4 NAND Flash

[michael239955_stm1_stmicro_com]

Posted on March 02, 2015 at 22:00

I am looking to use the FMSC on the STM32F4 series to store data on a NAND chip.

How do I go about doing this? Are there any examples out there of this? Is a driver or special libraries required? #stm32f4 #external #nand-flash

[Tesla DeLorean]

Posted on March 02, 2015 at 22:35

For interfacing, review the

http://www.st.com/web/en/catalog/tools/FM116/SC959/SS1532/PF250374?sc=stm3220g-eval

board, F2 and F4 are materially very similar STM32F2-F4_Demonstration_Builder_V1.0.1\Utilities\STM32_EVAL\STM322xG_EVAL\stm322xg_eval_fsmc_onenand.c NAND memorys are pretty well documented, and there are plenty of open source examples. I personally would tend to avoid NAND parts, I've had a lot of problems sourcing them in the past, and they keep getting obsoleted (companies merge, EOL), or change packaging, block sizes, ecc sizes, etc. If you can do what you need with something like a MicroSD card, or eMMC, that's likely to exist for more than a year or two.

[michael239955_stm1_stmicro_com]

Posted on March 03, 2015 at 03:11

That example talks to OneNAND memory, but all the structures in the example that set up the FMSC set it up for NOR memory. Why is this?

[Tesla DeLorean]

Posted on March 03, 2015 at 04:12

NAND, NOR, SRAM the external interfacing from a signal timing perspective are quite similar. You could perhaps use the READY/WAIT signals, but stalling the processor waiting on slow external memories isn't a very good strategy. Much better to yield the processor to other tasks, and probe a status signal latter/periodically.

NAND acts like a hard drive, a window on blocks of memory, so while you might have 32GB, or whatever, it fits in a 256MB decode window, and in fact has only 2 or 3 address bits. You request a block, and then pull a stream of data, you can't execute in place. The STM32 has some NAND support, but as I recall the ECC implementation is very specific and limited, most devices now have their own syndrome generation/checking engines, and can then pass off the results to software routines to fix the errors. Also as geometries shrink the NAND array gets slower, and less robust.