Ethernet MAC stops transmitting when APB2 divided by 16 (STM32F407)

[hub]

Posted on February 12, 2018 at 15:29

Hello,

I have generated project from STM32CubeMX, FreeRTOS and Ethernet. I have working Ethernet with websockets, SDIO SD card and SPI1.

On SPI1 bus I use optocouplers for galvanic isolation and I need to use the slowest SPI1 clock (so I get nice digitale edges on the optocouplers) but the fastest CPU speed (to handle many things). So HCLK is 168 MHz and by /16 divider on APB2 and 256 divider in SPI peripheral I can get the desired maximal frequency 41 kHz, but the ethernet stops functioning. In UART console I see transmitting DHCP requests in a loop every 4 / 8/ 16 seconds..

When I use APB2 divider /2 /4 /8 it works ok and I get interrupts from ETH, but the /16 divider breaks the ethernet.

When I use APB2 /16 divider, the I no longer see the transmitting packets with a scope on TXD0/1 or RMII, on RXD0/1 I see some incoming network traffic. The code also don't jump to the ETH IRQ handler (probably because no DHCP request is sent)

Systick which is calling osSystickHandler works ok

TIM14 IRQ which is on APB1 is calling HAL_IncTick is ok.

MDIO/MDC communication with PHY is ok and I see the end of autonegotiation with a scope on the wires.

I've attached the picture with clock tree and scope traces for /8 where you can see RMII_TX communication and with /16 divider where the TX_EN pulse is suspiciously shorter and without any TX data.

Dividing APB1 bus by /16 is ok, so If I don't find solution the I could try to use SPI2 which is on APB1 which is fine if I enable /16 divider. But if anyone has another idea of workaround, that would be nice.

I need to use optocouplers for low price, I know about iCouplers and other capacitative and inductive galvanic isolators but it is not possible to use them because of the price and also because I use just 12 V rail/logic on the output side. Also I would be ok with 5kHz SPI clock, but aparently the F4 has all the peripherals clock derived form HCLK.

Thank you for any tips/ideas.

Martin

#apb2 #rmii #ethernet #stm32f4

[waclawek.jan]

Posted on February 12, 2018 at 15:49

Can't this be consequence of Errata rev.9 2.1.13  Delay after an RCC peripheral clock enabling ?

Try inserting some delay between setting RCC_APB2ENR.SYSCFGEN and writing into SYSCFG registers - here probably setting RMII mode in SYSCFG_PMC.MII_RMII_SEL

JW

[waclawek.jan]

Posted on February 12, 2018 at 16:24

Humm.

How are MAC and PHY clocked, exactly?

JW

[Tesla DeLorean]

Posted on February 12, 2018 at 16:43

Likely intolerant of clock inversion*, the SD card is too. Admittedly this describes AHB, but I could see issue if DMA or APB2 interaction drags excessively.

Suggest using an SPI on APB1 (the slow bus) instead, but avoid things causing contention.

Pretty sure APB2 >= APB1 also.

*The AHB clock frequency must be at least 25 MHz when the Ethernet is used.

[hub]

Posted on February 12, 2018 at 16:03

No luck.

I've added delay 10ms, then 1000ms to make sure the delay works. Even tried to single step instructions. I've checked the PMC register and the bit MII_RMII_SEL is set, which is ok i guess.

[hub]

Posted on February 12, 2018 at 19:43

Waclawek.Jan

‌

Each chip has its own crystal. STM32 has 8 MHz, the KSZ PHY has 25 MHz crystal. From the PHY goes the reference clock to STM32F4. I'll check that once again tommorow that reference clock is running.

Turvey.Clive.002

‌

Thanks for tips Clive. So that sounds like I can try to divide APB1 and 2 both by / I'll try that tommorow.

Thanks for confimation that SPI on APB1 should be the right way.

[waclawek.jan]

Posted on February 12, 2018 at 20:42

> the KSZ PHY has 25 MHz crystal.

So it has a PLL outputting the 50MHz RMII clock?

Although I can't quite think of a mechanism which would cause that, I'd check relevant GPIO registers if the ETH-related pins (including the clock) are set properly.

Oh an also maybe I'd try another delay *after* setting SYSCFG_PMC.MII_RMII_SEL.

Yes it's unlikely these things help, but they are at least easy to try 😉

JW

[hub]

Posted on February 13, 2018 at 14:44

I've tried set the APB1 and APB2 prescaller to the same /16 value but no luck.

The additional delays() did not helped too.

I've solved the problem by implementing software SPI in the interrupt. It will have software overhead but 30Hz refresh rate is acceptable for me.

Thanks, Martin.