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STM32F205 , 64 pin, breakout board

vindhyachal
Associate II
Posted on August 26, 2015 at 10:34

1. Is there any breakout board available for STm32F205RBT6?

2. I had some issues with my MCU, which I couldn't resolve: http://tinyurl.com/qf7jguw

(thread: SWD floats, STM32F2, code don't run)

3. Problem could be in board or software. To remove any hardware problem, I am redesigning my board. First I am making a small breakout board, so that the design of MCU always remains the same. 

4. Below is attached minimum schemtic required to run MCU.

http://docdro.id/z3M8I0q

5. No other pullup-pulldown/cap is required.Right?

6. All ununsed pins will be made GPIO_ANALOG to reduce power consumption.

#enumeration #wait-for-you--clive1-!-!-! #creepy-tag #enumeration
7 REPLIES 7
Amel NASRI
ST Employee
Posted on August 26, 2015 at 17:59

Hi takniki.vindhyachal,

Seeing your current post and the other discussion you submitted regarding the faced issues, I highly recommend you to have a look to the

http://www.st.com/st-web-ui/static/active/en/resource/technical/document/application_note/CD00292095.pdf

.

It describes how to get started with hardware implementation of STM32F2 to design your PCB. It is required for example to add the decoupling capacitors to VDD pins.

-Mayla-

To give better visibility on the answered topics, please click on Accept as Solution on the reply which solved your issue or answered your question.

Posted on August 26, 2015 at 18:51

You need pull-downs on both BOOT0 and BOOT1 (PB2)

I'd strongly suggest a pull-up on NRST.

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vindhyachal
Associate II
Posted on August 27, 2015 at 14:38

 1. Page 16 of AN3320, shows that BOOT1(PB2) is dont care in case BOOT0 is pulled down.

Is it recommended practice to do so? In that I would permanently pull-down, so won't be able to use its other function.

2. Also datasheet says, reset pin have internal pull-up & a decoupling cap is required.

Again is it recommended to connected RC (R=10K, C=0.1uF), across reset pin.

3. Also on power up, default JTAG pin are configured:

JNTRST: Internal pull-up

JTDI: Internal pull-up

JTMS/SWDIO: Internal pull-up

TCK/SWCLK: Internal pull-down

JTDO: Input floating

Any external pull-up/down required on these?

Posted on August 27, 2015 at 14:50

I've made my suggestions, you can take them, or not.

BOOT1 can be used as a GPIO or Peripheral pin regardless of the pull-down. It's state becomes important if you connect BOOT0 high to get into the System Loader, which is useful if you want to validate the device is functioning, or you want to program the device in production.

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vindhyachal
Associate II
Posted on August 31, 2015 at 11:33

Currently I am doing this to avoid any problem:

1. boot0 & boot1: pull down by 10K

2. I am using SWD, but since on reset pins are by default JTAG so to avoid any unknown state(although ST datasheet says it has internal pull-up/down on jtag ines except JTDO which is floating). 

TRST, TDI, TMS(SWDIO): pull up 10k

TCK(SWCLK): pull down 10k

TDO: Pull up 10k 

3. NRST: 10K pull down & decouple with 0.1uF cap.

4. Also pin PA0 is  by default wakeup pin. In case I don't use wakeup or don't use this pin. What should be correct value of pull up-down I should use to avoid any uncontrolled I/O levels?

Posted on August 31, 2015 at 14:24

NRST should have a Pull-UP, not down.

If you're not putting the device to sleep, and not using WKUP you can ignore it. If you want put a Pull-DOWN on it.

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vindhyachal
Associate II
Posted on September 01, 2015 at 07:55

1. I have updated the circuit as here:

http://docdro.id/0Z1Huka

2. I was checking keil document here:

http://www.keil.com/mcbstm32c/mcbstm32c-base-board-schematics.pdf

They have 47K pull-up or down on jtag lines.

Should I go with 47K or I can also put 10K.

3. I didn't get your point on wakeup. 

I am not using it. On reset, this pin is floating & function is wakeup.

So should i connect pull-down resistor as i am not using it.

Also as in point 2 link, they have strange wakeup pull-down & caps.