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STM32F407VG+SRAM+ADDRESS PINS MISSING?

mitjaneho
Associate II
Posted on November 07, 2014 at 03:59

I am trying to interface an external SRAM with the stm32f407vg discovery board and i bumped into some issues with address pins not being available for FSMC.

As you guys might already know, the SRAM has both the Address and Data Pins. the one that i am using, is an IS61WV102416BLL 2MB SRAM. The problem i am facing now is that although the data pins D[0:15} are available in the discovery board, i realized the PFx pins which relate to the Address (in case of this ram i need [0:19]) are not available (some are, the once which are in the PDX pins). I found a code which I could work on and that configures the PFx pins to the very same SRAM but as i mentioned before, is not available in the stm32f407vg 100 pin package that the discovery uses. 

Code:

[

https://code.google.com/p/yazanamu-iar-workspace-stm32f4-discovery/source/browse/trunk/STM32F4-Discovery_FW/Utilities/STM32_EVAL/STM3240_41_G_EVAL/stm324xg_eval_fsmc_sram.c?r=11

]

Configuration:

0690X00000605UrQAI.png

is there a way around this? could i use other GPIO's and use them as addresses?

I did do some research on this one and i read that one could use a latch(?) for multiplexing the address(?). is it possible to do it with the discovery board?

thanks in advanced for the trouble

6 REPLIES 6
Posted on November 07, 2014 at 08:40

> is there a way around this? could i use other GPIO's and use them as addresses?

No.

> I did do some research on this one and i read that one could use a latch(?)

> for multiplexing the address(?). is it possible to do it with the discovery board?

Yes. The FSMC has to be placed into multiplexed mode, and 16 bits of the lower address are to be latched by the NADV signal (PB7, FSMC_NL).

JW

mitjaneho
Associate II
Posted on November 07, 2014 at 11:54

Posted on November 07, 2014 at 12:07

> My question here is: why is the PB7 NL pin connected to a hex converter(?) first [74HC04] and then only connected to the flip flop/latcher? why is this step necessary?

Because the NL signal is active low (that's why its name starts with ''N'' as in ''Negative'') and the '573 transparent latch's control input is active high.

Look at the datasheet of '573 and the waveforms for the FSMC's multiplexed mode in RM0090.

JW
Posted on November 07, 2014 at 17:49

Connecting additional circuitry to the already rather contended design for the F4-DISCO will be a challenge. Consider if a different evaluation board would get you to your goals quicker. Either one having more features already, or a more pure break-out play.

http://www.ebay.com/itm/RedDragon407-STM32F4-Cortex-M4-3-2-Ethernet-wireless-2-4G-SDIO-Serial-camera-/121087293812

http://www.ebay.com/itm/Core407I-STM32F407IGT6-STM32F407-STM32-ARM-Development-Board-Full-I-O-expander-/251145395966

http://www.ebay.com/itm/XCore407I-STM32-Development-Board-STM32F407IGT6-STM32F407-Cortex-M4-Starter-Kit-/251341026080

The STM32F429I-DISCO has external SDRAM and LCD, but seriously limits use of SDIO, ETHERNET, DCMI, etc.

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mitjaneho
Associate II
Posted on November 08, 2014 at 12:08

mitjaneho
Associate II
Posted on November 08, 2014 at 12:28

Hey Clive1,

I see, thanks for taking the time for going over some of the boards. The problem though is that my project might not fund me for additional development boards. The best option right now is to make use of what i have..

I will consider these for my future projects.