Posted on April 01, 2015 at 18:22Hi
I read the AN4031 application note ''Using the STM32F2 and STM32F4 DMA controller''.
In this document it is mentioning that the AHB Multi layer bus has an Arbiter on each layer, which handles the bus arbitration .
But I coudn't see any block diagram of this arbiter and any details of it.
So som please kindly help me to know how the AHB bus arbiter is used in each layer & how it handles all the communications?
#dma #spi #stm32-dma
