STM32F0 SPI slave mode issue TXRX HAL

[robert239955_st]

Posted on January 13, 2016 at 17:24

Hi,

I'm using an STM32F0306 in SPI slave mode *** a sub processor in a project. I used cubeMX to generate the initialization and have added functions in Keil v4 The ST part is in slave mode, 8 bit motorola, LSB first , clock pol low, 2nd edge data

void
MX_SPI1_Init(
void
)

{


hspi1.Instance = SPI1;

hspi1.Init.Mode = SPI_MODE_SLAVE;

hspi1.Init.Direction = SPI_DIRECTION_2LINES;

hspi1.Init.DataSize = SPI_DATASIZE_8BIT;

hspi1.Init.CLKPolarity = SPI_POLARITY_HIGH;

hspi1.Init.CLKPhase = SPI_PHASE_2EDGE;

hspi1.Init.NSS = SPI_NSS_SOFT;

hspi1.Init.FirstBit = SPI_FIRSTBIT_LSB;

hspi1.Init.TIMode = SPI_TIMODE_DISABLED;

hspi1.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLED;

hspi1.Init.CRCPolynomial = 7;

hspi1.Init.CRCLength = SPI_CRC_LENGTH_DATASIZE;

hspi1.Init.NSSPMode = SPI_NSS_PULSE_DISABLED;

HAL_SPI_Init(&hspi1);


}

When the main processor receives a flag, it pulls the CS low, and sends a packet and the clock pulses to drive the transfer. I'm sending 28 bytes but the last three bytes aren't transmitting and then on the next packet the FIFO flushes these out before my data. This is received as a corrupt transfer on my main processor.

1.
for
(uint8_t j=0;j

   
  first byte should be 0x80 
   
  

1.
uint8_t SPI_Buff[28]={ 0x80, 0x2a, 0x2a, 0x2c,
/*FIXED*/
2.
0x00, 0x00, 
3.
0x79, 0x7F, 0x7F, 0x7F, 
/*touch1*/
4.
0x79, 0x7F, 0x7F, 0x7F, 
/*touch2*/
5.
0x79, 0x7F, 0x7F, 0x7F, 
/*touch3*/
6.
0x79, 0x7F, 0x7F, 0x7F, 
/*touch4*/
7.
0x79, 0x7F, 0x7F, 0x7F, 
/*touch5*/
8.
0x63};

   
  but as can be seen, the data is shift three packets and clearing the DR reg does not fix the issue. 
  
 
   
   
  Any hints would be appreciated. 
   
  Regards 
  Robert  
  #stm32-spi-slave

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