Question about DMA Peripheral Address Increment

[coppercrimp]

Posted on January 27, 2015 at 09:48

I see there is a option to increment a peripheral address after after a DMA peripheral-to-memory transfer. I'm curious to know what the purpose of this is. I can see the usefulness of incrementing the memory pointer after a transfer, but I'm failing to see why you'd ever need to increment the peripheral address.

[qwer.asdf]

Posted on January 27, 2015 at 11:40

There are many use cases, for example writing to an LCD screen using FSMC. Or for transfering data from flash to RAM. There are examples in both SPL and HAL distributions.

[coppercrimp]

Posted on January 27, 2015 at 17:13

Okay, but it looks like devices on the FSMC bus are memory mapped directly into the micro's address range and so don't have a peripheral interface in the usual sense (i.e. I2C, SPI, UART, ADC, etc.). Plus the device I'm using (STM32F401) doesnt have an FSMC bus. So I'm still left wondering what the use case is for DMA peripheral address increment.

HAL has some example code for memory-to-memory DMA transfers, but I'm not finding any for memory-to-peripheral with peripheral address increment

[Tesla DeLorean]

Posted on January 27, 2015 at 18:10

And you're worrying about this because?

The DMA unit is general purpose in nature, the peripherals are also mapped into the same address space, the same increment/don't increment configuration bits impact memory-to-memory targets. A lot of silicon design is about placing the same circuit (cell) over and over, the optimization and sameness often overrides the fact that some gates might not be used in anger in 99.999% of customer use cases. So say I want to use DMA to write into a TIM's CCR1,CCR2,CCR3, and CCR4, in a circular fashion, triggered by the Update? Write to the USB FIFO?

[coppercrimp]

Posted on January 27, 2015 at 18:41

I'm not worrying about it, just asking. I'm new to the STM32 and I've been reading up on it's function. From time to time questions come up and this is one of them.

So far qwer.asdf has stated there are many use cases, and you have stated there are 0.0001% customer use cases. I'm as confused as ever

[Tesla DeLorean]

Posted on January 27, 2015 at 19:19

No I'm saying that some gates in the design aren't used by practically anyone, and in fact you'd be hard pressed to use all the peripherals in the STM32 designs, and get that functionality out the pins.

The fact I might be able to use this feature to generate some high speed and exotic signalling, with very little software interaction allows me to works outside the box of ''why's this here''. There are undoubtedly a number of other clever applications of this feature, I'm not sure of the value of enumerating them.

[waclawek.jan]

It is off topic, and instead of hijacking a historical thread, you should start your own.

JW

[MHank.1]

In memory-to-memory transfers the peripheral acts as the destination.

[Sana_Tariq]

You are right. It didn't occur to me as I'm new to this platform and this is my first ever message to any public forum. I will keep your suggestion in mind 🙂
I will check out the replies from MHank.1 and Tesla DeLorean below and will open a separate thread if I have further queries.
Thanks.