confusing about tpclk on page 662,RM0008 REV 15

[346239463]

Posted on January 31, 2015 at 13:44

Hi,all.I am so confusing about the term tpclk on page 662,what does this PCLK mean exactly?pclk1 or just the word pclk?In my opinion,I guess the word tpclk represent 1/fpclk1,am I right?

Thanks for hlep. #can #tpclk

[Tesla DeLorean]

Posted on January 31, 2015 at 16:51

PCLK is the clock of the APB (Peripheral Bus) to which the CAN unit is attached. The period of the clock is 1/PCLK seconds.

The CAN peripheral of the STM32F1 designs is on APB1 (the slower bus)

[346239463]

Posted on January 31, 2015 at 18:04

I guess so,just not sure.Thank you very much.

But,if I configure the APB1 to its max frequency,36MHz,then tpclk will be (1/36M),which equal to 28ns. My project require a 200ns time quanta,how can I get this?

[Tesla DeLorean]

Posted on January 31, 2015 at 20:25

Well from 72 MHz (36 MHz on the bus) you're not going to get exactly 200 ns.

You'd perhaps need to run the bus at 25, 30 or 35MHz. Would 194.44 ns work? Getting to specific CAN baud rates is going to be a combination of APB clock, prescaler, and arrangement of SWJ,BS1 and BS2 settings. So perhaps start with the desired baud rate and factor those.

[346239463]

Posted on February 01, 2015 at 07:28

I don't have any idea yet,but I can take a try today,thank you very much,clive1.