Execute code from External memory

[rs11]

Posted on August 04, 2009 at 10:15

Execute code from External memory

[rs11]

Posted on May 17, 2011 at 12:50I have the below questions about executing code from an external PSRAM connected to the External Memory Interface of the STM32 micro controller. 1) Is the prefetch queue applicable to only the internal Flash? or does it apply for memories on the EMI as well? 2) Since both PSRAM & NOR flash is 16 bit wide, due to needing two instruction fetches for the Thumb-2 32-bit instructions, system is expected to execute at half the speed. Is there any other caveats in this kind of a memory configuration? 3) Is there any document reference which compares the timing values of code executing from Internal Flash, Internal RAM, External RAM? Or can someone who has experienced something like this please share how these compares?

[joseph239955]

Posted on May 17, 2011 at 12:50

There is a 3-word instruction fetch buffer inside the Cortex-M3 processor. This buffer applies to program execution from flash as well as from SRAM or external memory.

Beside from that, there is also a flash memory prefetch unit directly couple to the flash. This only applies to executing program from flash memory. Instruction fetch on the Cortex-M3 processor is always 32-bit. For each instruction fetch, it will have to be divided into two 16-bit accesses. And there might be wait states for each 16-bit read, as well as data registering stage for feeding back the external data to the processor, so it will be less than half of the speed. However, for each access you could be fetching 2 16-bit instructions, so the ratio of execution speed cannot be calculated in a straight forward manner. The best thing to do is to try and see. [ This message was edited by: joseph.yiu on 02-11-2008 12:16 ]

[rs11]

Posted on May 17, 2011 at 12:50

Thanks Joseph & Moderator.

The old thread mentions a 11 times difference in execution speed. Assuming this 11 times was for a NOR flash, a PSRAM would reduce that to 8.2 times (assuming 70 ns PSRAM & 93 ns NOR flash). Even with a PSRAM, the effective MIPS would be then ~10 @ 72MHz (assuming ~86MIPS @ 72Mhz when executing from internal Flash). Such a big difference recommends one to _not_ to use the STM32 if the code size is more than 512KB. Can someone from ST confirm if these results are as expected?

[16-32micros]

Posted on May 17, 2011 at 12:50

Thanks Joseph for the detailed comments. However, I believe that rs1 is talking about the Prefetch buffer coupled to the flash, which , as you have said, accelerates the execution only out of Flash, For more details refer to PM0042 ''STM32F10xxx Flash programming'' , section ''Read Operation''.

For the Comparison between External NOR and Internal(Flash) code execution, You can refer to these results posted in this thread :

http://www.st.com/mcu/forums-cat-7358-23.html

Cheers, STOne-32.[ This message was edited by: STOne-32 on 02-11-2008 15:30 ]