STM32F103: noise on GPIO input signal causes weird behaviour

[amarchi]

Posted on February 11, 2015 at 22:56

Hi everybody,

I am struggling against a weird behaviour on a input GPIO.The GPIO input circuit is a simple pull-up; due to other components connected to my board, there is sometime some noise injected into the GPIO input line. The GPIO input voltage is normally about 3.3 V (as i mentioned above, input ciruit is a simple pull-up), when the noise is injected, the input oscillates between  3.3Vto 0V for about 20 usec (measured with oscilloscope). If I run a really simple application where the main function is just a loop where I read the gpio input value and set the read value to a output gpio, what I see is that sometimes when I inject noise in the input gpio, the output gpio stays low for about 500 ms (!!) even if the input signal is already high (the noise only lasts 20 usec..).The only explanation I could give is that the gpio internal schmitt trigger keeps the internal value low... but of course it is hard to explain why.Did you ever encounter similar problems?Thank you!

[zeros_and_ones1991]

Posted on February 12, 2015 at 18:10

500 ms is kinda disastrous , but I encountered similar problem , and it turned out that the Faulty IO was running at the low speed (2MHz) while the IO next to it was running at highest speed (100 MHz) , so it was like a cross-talk . When I ran the 100MHz IO at 25 MHz , no cross-talk occurred and every thing was ok . 

Hope u find out soon . 

[Tesla DeLorean]

Posted on February 12, 2015 at 18:19

What frequency is the noise, and how the heck does it go rail to rail?

The inputs have a synchronizer on them (figure two or three chained flip-flops) to get the signal into the internal clock domain. This will tend to filter glitches, high frequency, or other setup time violations, etc.

[amarchi]

Posted on February 13, 2015 at 10:15

The board has different power supplies (5V and 12 V). Of course there is some flaw in the hardware design, when an external  elctromechanical component is opened and closed by means of an on board realy the noise propagates to the input line; I have not measured precisely the noise frequency, by looking at the oscilloscope captures it seems to be a frequency between 20 - 30 Mhz.

In some boards the noise actually does not go rail to rail, it ranges from 2 to 5 V (aroud the pulled-up input of 3.3 V). Anyway also in this case the problem sometimes occurs, it seems that there is some parasitic capacitance in the internal GPIO circuitry that is charged by the noise energy and then slowly discharges fixing the input of the internal registers to the low value for 500 ms.Other possible explanations or tests to perform are very well accepted 🙂Do you know if it is possible to get the shematic of the internal circuit of the GPIO?Thank you!

[Danish1]

Posted on February 13, 2015 at 11:49

You say the frequency is between 20 and 30 MHz. That is quite high for things like oscilloscope probes - not in the sense that you can't see 30 MHz - but in the sense that you might be missing harmonics also present on the pin, and the actual voltage excursion could be greater. Indeed the capacitance of the oscilloscope probe probably seriously alters what is happening on the pin unless you are specifically using a x100 low-capacitance probe. And the oscilloscope probe's ground tag must also be very close to where you are probing with a very short lead.

Why is this important?Well it might be that spikes on the pin are turning on the ESD protection associated with each pin. In my day*, such ESD protection was simply body-diodes from the pin to each supply rail, so any pin could not go more than one diode-turn-on-voltage beyond either supply rail. (There would also be a crowbar between the supply rails).This is all very well, and protects the delicate input transistors from blowing up during ''normal'' ESD events. But it does not imply correct operation during these ESD events. The body diodes would inject minority carriers into the bulk of the silicon substrate, and these carriers could drift around and affect any nearby circuitry. You can pretty-much guarantee that analog circuits would be out-of-spec (e.g. offset-voltage) for tens of milliseconds after the event. Get it bad enough and the digital signals would be (temporarily) wrong as well (these chips are tuned for low power-consumption rather than radiation-hardness). One such digital signal might be the thing that says ''this pin is an input so turn off the output transistors''.*Things are probably more complicated now since there are 5V-tolerant pins; there might be an internal 5V clamp line.Under these circumstances the ''intended'' schematic (which I suspect is proprietary so ST would be reluctant to release it) does not show you how things might misbehave.Hope this helps your understanding even if it does not get you closer to solving your problem,Danish