STM32F437 Vbat failure detection

[petertroester9]

Posted on March 16, 2015 at 17:21

We are using the internal RTC backed up by a goldcap.

In case of a power outage the backup voltage becomes lower by increasing time and at some time the oscillator stops running, but the RAM still remains valid for some time. So a magic number in RTC-RAM doesn't catch this. If the power returns while RTC-RAM is still valid everthing appears to look fine, but the RTC counter has stopped for an unknown time. How can I detect the (potential) loss of time if RTC-voltage decreases? Any idea is appreciated.

[waclawek.jan]

Posted on March 18, 2015 at 09:50

The 'F4 is not very well suited for low power operation and for RTC, consider a battery rather than a supercap.

The voltage of VBAT can be measured by ADC, e.g. in a periodic wakeup. This of course would increase the current consumption - not only the core must wake up and start the ADC, but also the VBAT measurement involves connection of a divider to VBAT which sucks additional power from it. Some other STM32 models also have a clock-security circuitry for LSE, in 'F4 there's no such (only on HSE). You could also consider using IWDG refreshed from a periodic wakeup triggered by RTC, i.e. once RTC stops, IWDG bites. This also involves extra power. You could also try to use an external micropower voltage detector. JW

[petertroester9]

Posted on March 30, 2015 at 08:49

Thank you for your proposals.

In case of a power fail there is no way to wake up. So this approach unfortunately won't work. A change in the hardware configuration is beyond of scope as well. So maybe I must remain with my current approach to store the actual time in a nonvolatile memory every second as long as the system is powered. After the return of power I check if the RTC is within a window of time where I can make shure Vbat is still valid. Unfortunately this binds me to the lower limit where I hoped for a way to reach the upper limit.