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STM32L476QE Flash write and Erase API

horairajilani
Associate II
Posted on September 10, 2015 at 14:12

We are using STM32LL476QE and as per reference manual , While executing a program code from bank 1, it is possible to perform a program operation on the bank 2.

Here we are into situation in which Our custom Bootloader will be executing from BANK1 and will be writing Application Binary on BANK1 itself at the time of update, will that work or we need to execute flash program and erase API's from RAM?

We are using GNU ARM tool-chain from https://launchpad.net/gcc-arm-embedded

Can you please suggest some robust method to do this ?

#stm32l4xx
4 REPLIES 4
Amel NASRI
ST Employee
Posted on September 10, 2015 at 15:54

Hi horaira,

RM0351 provides the following answer:

''An on-going Flash memory operation will not block the CPU as long as the CPU does not access the same Flash memory bank. Code or data fetches are possible on one bank while a write/erase operation is performed to the other bank.

On the contrary, during a program/erase operation to the Flash memory, any attempt to read the same Flash memory bank will stall the bus. The read operation will proceed correctly once the program/erase operation has completed.''

-Mayla-

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Posted on September 10, 2015 at 23:12

In other words, it works as with (most?) other STM32-models: if you want to run code simultaneously while writing to (or erasing a block) FLASH (e.g. the communication used cannot tolerate a lag imposed by the write), it must reside in a different memory or a different FLASH bank (if any), including ISRs. Otherwise, as Mayla wrote above, the processor will simply stall until the write completes and happily resume after.

JW

horairajilani
Associate II
Posted on September 23, 2015 at 17:04

Thanks,

One more question related to this,

Scenario: Code is executing from BANK1 and doing erase/program operation on BANK2 

Does this operation is interruptible, i.e. can any High priority interrupt or Task preempt it?

Any side effect ?

Thanks in advance

Posted on September 23, 2015 at 18:58

Well it's not part of the processor core, the flash controller will keep doing what it was doing until completion and the processor can run doing it's thing.

If you look at or touch BANK2 while it's erasing or writing, you can expect processor execution to stall until the operation has completed, and then respond to the access request.

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