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LCD pixel noise

greg239955_stm1
Associate II
Posted on September 13, 2017 at 11:17

I'm working on a board that is close to the 429 Discovery board, using:

- STM32F429 micro

- LTDC connection to a custom 3 inch LCD using ili9327 controller, connected via display pixel interface

- IS42SI6400J SDRAM used as frame buffer

- STemWin library using linear display driver

I'm getting some pixel noise on the right side of vertical edges, uniformly across the screen, that is colour dependent.

Red and Blue are OK. Green is bad. Shades of white/grey are also bad.

Here's a video of it: 

https://youtu.be/lFuAuqYay6E

 

We've tried 2 different displays and 2 different board layouts. Last layout is a 4 layer board with careful attention to track lengths and routing, as per the ST guidelines. In all cases the same symptoms are present.

I've also tried a variety of settings for front/back porch etc, but nothing helps.

Does anyone have any suggestions that might help to solve this?

Thanks.

#lcd #ltdc
1 ACCEPTED SOLUTION

Accepted Solutions
Posted on September 13, 2017 at 16:19

Incorrect pixel clock polarity, leading to data-to-clock setup/hold violation?

JW

View solution in original post

3 REPLIES 3
T J
Lead
Posted on September 13, 2017 at 12:33

grey and white contain green.

did you try another brand SDRAM ?

do you have an oscilliscope ?  if you fill with green and check the data lines.

did you pay attention to 5:6:5 what configuration did you pick ?

did you see the ili9327 data input is D0-17  thats 6:6:6 but you only have 16pins, not 18

did you set IM[2:0] to 010 ?

Posted on September 13, 2017 at 16:19

Incorrect pixel clock polarity, leading to data-to-clock setup/hold violation?

JW

greg239955_stm1
Associate II
Posted on September 14, 2017 at 07:18

Thanks so much to both of you. I found:

- display was wired as 18 bit, but I'd set the LCD register to 565.

- pixel clock polarity was indeed wrong, register was set to rising edge instead of falling. This is the one that fixed the noisy pixels