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What it the recommended way to obtain lots of clock switch functions?

arnold_w
Senior
Posted on May 31, 2016 at 16:28

I am working with the Discovery Development Board and a custom-made PCB with an STM32F405 microcontroller operating at 1.85 Volts. I would like to be able to easily switch clock frequency, that is, I would like to have functions called switchFreq_500_kHz, switchFreq_1_MHz, switchFreq_2_MHz, switchFreq_4_MHz, etc. I thought I had found a good way to do this, I used the makro in the STM32F4xx_Clock_Configuration_V1.1.0.xls Excel-sheet provided by ST Microelectronics and generated code and then I renamed, for example, SystemInit to SystemInit_500_kHz and SystemCoreClockUpdate to SystemCoreClockUpdate_500_kHz and to switch frequency I would call both of these functions. This works fine on the development board but after having updated the system-folder to the latest release my STM32F405 microcontroller is acting erratically and I've traced the problem to these functions. What is the proper way to create the functions I want?

12 REPLIES 12
Posted on June 01, 2016 at 06:52

> after having updated the system-folder

What is system-folder?

What has changed in it?

> What is the proper way to create the functions I want?

If you rely on some ''library'' stuff, especially if it's part of the startup code, it may have been written with the implication of all registers being at its reset value.

JW

arnold_w
Senior
Posted on June 01, 2016 at 10:08

When I create a new project in Eclipse (File->New->C- Project->STM32F4xx C/C++ Project) the newly created project contains, among others, a folder called system and it contains the following:

system
include
arm
semihosting.h
cmsis
arm_common_tables.h
arm_const_structs.h
arm_math.h
And 17 more files
.
.
.
cortexm
ExceptionHandlers.h
diag
Trace.h
stm32f4-hal
README_HAL.txt
stm32fxx_hal.h
stm32fxx_hal_adc.h
stm32fxx_hal_adc_ex.h
And 65 more files
.
.
.
Legacy
stm32_hal_legacy.h
src
cmsis
system_stm32f4xx.c
vectors_stm32f4xx.c
cortexm
_initialize_hardware.c
_reset_hardware.c
_exception_handlers.c
diag
Trace.c
trace_impl.c
newlib
_cxx.cpp
_exit.c
_sbrk.c
_startup.c
_syscalls.c
assert.c
README.txt
stm32f4-hal
stm32f4xx_hal.c
stm32f4xx_hal_adc.c
stm32f4xx_hal_adc_ex.c
And 65 more files
.
.
.

arnold_w
Senior
Posted on June 01, 2016 at 10:16

Please see the attached file changes in the system folder (there were so many changes in the HAL-files that I didn't expand those folders).

________________

Attachments :

Diff.png : https://st--c.eu10.content.force.com/sfc/dist/version/download/?oid=00Db0000000YtG6&ids=0680X000006I0ZS&d=%2Fa%2F0X0000000baa%2F2BHe1kf7pzzkfl6LSDxziBhI_hLBeacvKFo2PYVEPDA&asPdf=false
Posted on June 01, 2016 at 17:59

What is the proper way to create the functions I want?

Take known working code, understand it and modify it, or review the manuals and code it yourself. Perhaps try to configure the register programmatically where you specify the speed and it sets the clocks up at the rates/ratios you want, rather that coding multiple functions doing practically the same set of configurations. Instead of relying on an Excel sheet review the Reference Manual and understand the RCC registers being used and how the clocks are geared.

The PLL isn't going to work at these low speeds, you'd want to use HSE/HSI directly, and gear down via the AHB/APB dividers, all these could be the same (ie 1x wrt each other) at 16 MHz and below. The only issue I'd see is a clock inversion, or PLL issues, if you need USB or SDIO, etc.

Tips, Buy me a coffee, or three.. PayPal Venmo
Up vote any posts that you find helpful, it shows what's working..
arnold_w
Senior
Posted on June 03, 2016 at 10:59

Does anybody know what's wrong with the code below since it doesn't work?

typedef
enum
{
CLOCK_FREQ_1_MHz = 1,
CLOCK_FREQ_2_MHz = 2,
CLOCK_FREQ_4_MHz = 4,
CLOCK_FREQ_8_MHz = 8,
CLOCK_FREQ_16_MHz = 16,
CLOCK_FREQ_32_MHz = 32,
CLOCK_FREQ_64_MHz = 64,
CLOCK_FREQ_128_MHz = 128,
CLOCK_FREQ_168_MHz = 168
} ClockFreqType;
void
ClockSwitch(ClockFreqType clockFreq)
{
RCC_OscInitTypeDef RCC_OscInitStruct;
RCC_ClkInitTypeDef RCC_ClkInitStruct;
switch
(clockFreq)
{
case
CLOCK_FREQ_1_MHz:
{
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
RCC_OscInitStruct.HSICalibrationValue = 16;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
HAL_RCC_OscConfig(&RCC_OscInitStruct);
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSI;
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV16;
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0);
break
;
}
case
CLOCK_FREQ_2_MHz:
{
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
RCC_OscInitStruct.HSICalibrationValue = 16;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
HAL_RCC_OscConfig(&RCC_OscInitStruct);
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSI;
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV8;
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0);
break
;
}
case
CLOCK_FREQ_4_MHz:
{
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
RCC_OscInitStruct.HSICalibrationValue = 16;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
HAL_RCC_OscConfig(&RCC_OscInitStruct);
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSI;
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV4;
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0);
break
;
}
case
CLOCK_FREQ_8_MHz:
{
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
RCC_OscInitStruct.HSICalibrationValue = 16;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
HAL_RCC_OscConfig(&RCC_OscInitStruct);
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSI;
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV2;
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0);
break
;
}
case
CLOCK_FREQ_16_MHz:
{
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
RCC_OscInitStruct.HSICalibrationValue = 16;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
HAL_RCC_OscConfig(&RCC_OscInitStruct);
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSI;
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0);
break
;
}
case
CLOCK_FREQ_32_MHz:
{
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
RCC_OscInitStruct.HSICalibrationValue = 16;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
RCC_OscInitStruct.PLL.PLLM = 8;
RCC_OscInitStruct.PLL.PLLN = 64;
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
RCC_OscInitStruct.PLL.PLLQ = 4;
HAL_RCC_OscConfig(&RCC_OscInitStruct);
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV2;
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1);
break
;
}
case
CLOCK_FREQ_64_MHz:
{
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
RCC_OscInitStruct.HSICalibrationValue = 16;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
RCC_OscInitStruct.PLL.PLLM = 8;
RCC_OscInitStruct.PLL.PLLN = 64;
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
RCC_OscInitStruct.PLL.PLLQ = 4;
HAL_RCC_OscConfig(&RCC_OscInitStruct);
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2);
break
;
}
case
CLOCK_FREQ_128_MHz:
{
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
RCC_OscInitStruct.HSICalibrationValue = 16;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
RCC_OscInitStruct.PLL.PLLM = 8;
RCC_OscInitStruct.PLL.PLLN = 128;
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
RCC_OscInitStruct.PLL.PLLQ = 4;
HAL_RCC_OscConfig(&RCC_OscInitStruct);
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4);
break
;
}
case
CLOCK_FREQ_168_MHz:
{
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
RCC_OscInitStruct.HSICalibrationValue = 16;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
RCC_OscInitStruct.PLL.PLLM = 8;
RCC_OscInitStruct.PLL.PLLN = 168;
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
RCC_OscInitStruct.PLL.PLLQ = 4;
HAL_RCC_OscConfig(&RCC_OscInitStruct);
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5);
break
;
}
default
:
{
break
;
}
}
SystemCoreClockUpdate();
}

arnold_w
Senior
Posted on June 03, 2016 at 11:18

Most of the code in my previous post was generated using STM32CubeMX. The code still doesn't work even if I add HAL_RCC_DeInit() before the switch-statement.

arnold_w
Senior
Posted on June 03, 2016 at 11:39

My startup sequence looks like this:

001 __initialize_hardware_early (); 
// I made no changes to this
002 __initialize_hardware(); 
// I made no changes to this
003 HAL_StatusTypeDef HAL_Init(
void
) 
// Got rid of SYSTICK in this function
004 {
005 __HAL_FLASH_INSTRUCTION_CACHE_ENABLE();
006 __HAL_FLASH_DATA_CACHE_ENABLE();
007 __HAL_FLASH_PREFETCH_BUFFER_ENABLE();
008 
return
HAL_OK;
009 }
010 
011 
012 SystemClock_Config(
void
) 
// Got rid of SYSTICK in this function 
013 {
014 
// Enable Power Control clock
015 __PWR_CLK_ENABLE();
016 
017 
// The voltage scaling allows optimizing the power consumption when the
018 
// device is clocked below the maximum system frequency, to update the
019 
// voltage scaling value regarding system frequency refer to product
020 
// datasheet.
021 __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
022 
023 #warning 
''Please check if the SystemClock_Config() settings match your board!''
024 
// Comment out the warning after checking and updating.
025 
026 RCC_OscInitTypeDef RCC_OscInitStruct;
027 
028 
// Use HSI and activate PLL with HSI as source.
029 
// This is tuned for NUCLEO-F411; update it for your board.
030 RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
031 RCC_OscInitStruct.HSIState = RCC_HSI_ON;
032 
// 16 is the average calibration value, adjust for your own board.
033 RCC_OscInitStruct.HSICalibrationValue = 16;
034 RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
035 
// This assumes the HSI_VALUE is a multiple of 1 MHz. If this is not
036 
// your case, you have to recompute these PLL constants.
037 RCC_OscInitStruct.PLL.PLLM = (HSI_VALUE/1000000u);
038 
039 RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; 
/* 168 MHz */
040 
041 RCC_OscInitStruct.PLL.PLLQ = 7; 
/* To make USB work. */
042 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
043 HAL_RCC_OscConfig(&RCC_OscInitStruct);
044 
045 RCC_ClkInitTypeDef RCC_ClkInitStruct;
046 
// Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2
047 
// clocks dividers
048 RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK
049 | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
050 RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
051 
052 
// This is expected to work for most large cores.
053 
// Check and update it for your own configuration.
054 RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
055 RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
056 RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
057 HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5);
058 }
059 
060 SystemCoreClockUpdate(); 
// I made no changes to this
061 main()
062 ClockSwitch(CLOCK_FREQ_64_MHz); 
// The microcontroller is dead after this call. 
063 
// If I remove this call, then the microcontroller
064 
// runs fine at 168 MHz.

arnold_w
Senior
Posted on June 03, 2016 at 13:15

I found the main problem,stm32f4xx_hal_rcc_ex.c was not included in my project so the functionHAL_RCC_DeInit() was taken fromstm32f4xx_hal_rcc.c instead and that is a weak function that is completely empty. As soon as I includedstm32f4xx_hal_rcc_ex.c into my project, the clock switching started working, with one exception. For some strange reason all frequencies works fine, except 1 MHz. Does anybody know why?

void
ClockSwitch(ClockFreqType clockFreq)
{
// The code below was taken from HAL_RCC_DeInit() in file stm32f4xx_hal_rcc_ex.c
/* Set HSION bit */
SET_BIT(RCC->CR, RCC_CR_HSION | RCC_CR_HSITRIM_4);
/* Reset CFGR register */
CLEAR_REG(RCC->CFGR);
/* Reset HSEON, CSSON, PLLON, PLLI2S */
CLEAR_BIT(RCC->CR, RCC_CR_HSEON | RCC_CR_CSSON | RCC_CR_PLLON| RCC_CR_PLLI2SON);
/* Reset PLLCFGR register */
CLEAR_REG(RCC->PLLCFGR);
SET_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLM_4 | RCC_PLLCFGR_PLLN_6 | RCC_PLLCFGR_PLLN_7 | RCC_PLLCFGR_PLLQ_2);
/* Reset PLLI2SCFGR register */
CLEAR_REG(RCC->PLLI2SCFGR);
SET_BIT(RCC->PLLI2SCFGR, RCC_PLLI2SCFGR_PLLI2SN_6 | RCC_PLLI2SCFGR_PLLI2SN_7 | RCC_PLLI2SCFGR_PLLI2SR_1);
/* Reset HSEBYP bit */
CLEAR_BIT(RCC->CR, RCC_CR_HSEBYP);
RCC_OscInitTypeDef RCC_OscInitStruct;
RCC_ClkInitTypeDef RCC_ClkInitStruct;
// The code below was generated with STM32CubeMX
switch
(clockFreq)
{
case
CLOCK_FREQ_1_MHz:
{ 
// FOR SOME STRANGE REASON 1 MHz ISN'T WORKING!!!!!! Do you know why?
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
RCC_OscInitStruct.HSICalibrationValue = 16;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
HAL_RCC_OscConfig(&RCC_OscInitStruct);
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSI;
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV16;
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0);
break
;
}
case
CLOCK_FREQ_2_MHz:
{
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
RCC_OscInitStruct.HSICalibrationValue = 16;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
HAL_RCC_OscConfig(&RCC_OscInitStruct);
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSI;
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV8;
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0);
break
;
}
case
CLOCK_FREQ_4_MHz:
{
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
RCC_OscInitStruct.HSICalibrationValue = 16;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
HAL_RCC_OscConfig(&RCC_OscInitStruct);
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSI;
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV4;
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0);
break
;
}
case
CLOCK_FREQ_8_MHz:
{
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
RCC_OscInitStruct.HSICalibrationValue = 16;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
HAL_RCC_OscConfig(&RCC_OscInitStruct);
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSI;
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV2;
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0);
break
;
}
case
CLOCK_FREQ_16_MHz:
{
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
RCC_OscInitStruct.HSICalibrationValue = 16;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
HAL_RCC_OscConfig(&RCC_OscInitStruct);
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSI;
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0);
break
;
}
case
CLOCK_FREQ_32_MHz:
{
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
RCC_OscInitStruct.HSICalibrationValue = 16;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
RCC_OscInitStruct.PLL.PLLM = 8;
RCC_OscInitStruct.PLL.PLLN = 64;
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
RCC_OscInitStruct.PLL.PLLQ = 4;
HAL_RCC_OscConfig(&RCC_OscInitStruct);
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV2;
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1);
break
;
}
case
CLOCK_FREQ_64_MHz:
{
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
RCC_OscInitStruct.HSICalibrationValue = 16;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
RCC_OscInitStruct.PLL.PLLM = 8;
RCC_OscInitStruct.PLL.PLLN = 64;
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
RCC_OscInitStruct.PLL.PLLQ = 4;
HAL_RCC_OscConfig(&RCC_OscInitStruct);
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2);
break
;
}
case
CLOCK_FREQ_128_MHz:
{
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
RCC_OscInitStruct.HSICalibrationValue = 16;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
RCC_OscInitStruct.PLL.PLLM = 8;
RCC_OscInitStruct.PLL.PLLN = 128;
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
RCC_OscInitStruct.PLL.PLLQ = 4;
HAL_RCC_OscConfig(&RCC_OscInitStruct);
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4);
break
;
}
case
CLOCK_FREQ_168_MHz:
{
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
RCC_OscInitStruct.HSICalibrationValue = 16;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
RCC_OscInitStruct.PLL.PLLM = 8;
RCC_OscInitStruct.PLL.PLLN = 168;
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
RCC_OscInitStruct.PLL.PLLQ = 4;
HAL_RCC_OscConfig(&RCC_OscInitStruct);
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5);
break
;
}
default
:
{
break
;
}
}
SystemCoreClockUpdate();
}

Posted on June 03, 2016 at 18:59

Not sure why the 1 MHz specifically should be an issue, what stops functioning or how specifically does it fail?

In the model you have HSI is always running. Not sure if it ever needs re-enabling. At a register level I'd switch the CPU to using the HSI, as you can't change the PLL while it is functioning, really not sure how the HAL handles this or the order in which you need to call its functions.

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