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HardFault at ORR instruction, what is happening?!?

soren
Associate II
Posted on June 02, 2016 at 00:28

Hi,

I am trying to get STM32CubeMX + arm-gcc + Nucleo-073RZ to do things. It won't.

I can see in my debugger and lst file that

08000990 <SystemInit>:

SystemInit():

/Users/dongfang/workspace-arm/stm32cube-playground/Nucleo073RZ_LED_Blinker/Release/../Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/system_stm32l0xx.c:155

  * @retval None

  */

void SystemInit (void)

{    

/*!< Set MSION bit */

  RCC->CR |= (uint32_t)0x00000100;

 8000990: 4b0f       ldr r3, [pc, #60] ; (80009d0 <SystemInit+0x40>)

 8000992: 681a       ldr r2, [r3, #0]

 8000994: f442 7280 orr.w r2, r2, #256 ; 0x100

 8000998: 601a       str r2, [r3, #0]

At

8000994

, the orr instruction, I get a HardFault. This surprises me! Shouldn't that instruction be supported on an L0 even if I possibly compiled for a fancier core?

How can a simple orr with an inline operand (no memory access) cause a hard fault, I don't get it..

Thanks for any input!

Regards, Soren
1 REPLY 1
soren
Associate II
Posted on June 02, 2016 at 01:02

Okay ... sorry I see it now. I realized I compiled for cortex-m3 and an orr.w got output. That thing is not supported on m0plus. Got rid of the HardFault 🙂

Regards, Soren