IVOR1 handling

stefanodimascio9 · ‎2016-02-26

Posted on February 26, 2016 at 09:53

Hello,

I have read the core manual of SPC56EL70 (e200z4). I want to handle the IVOR1 exception with an interrupt routine in configuration.xml in SPC5Studio. It's not clear to me what I should write in the ISR in question (what number? IVOR1 is not present in INTC chapter in the reference manual)

Thank you very much

Erwan YVIN · ‎2016-02-26

Posted on February 26, 2016 at 10:55

Hello Stefano ,

Are you talking about Machine Check Interrupt (IVOR1)

or ivor1 about the software vector table ?

/* Software vectors table. The vectors are accessed from the IVOR4

handler only. In order to declare an interrupt handler just create

a function withe the same name of a vector, the symbol will

override the weak symbol declared here.*/

Already done in OSAL components

1) for IVOR1, (Machine Check Interrupt)

you should update ivor.s (using patch mode)

cf chapter 5.7.2 in e200z4RM.pdf

http://cache.nxp.com/files/32bit/doc/ref_manual/e200z4RM.pdf?fpsp=1&WT_TYPE=Reference%20Manuals&WT_VENDOR=FREESCALE&WT_FILE_FORMAT=pdf&WT_ASSET=Documentation&fileExt=.pdf

2) for ivor1 (software vector table) (from IVOR4)

did you check Table 473. Interrupt sources for INTC_0 and INTC_1 ?

in RM0342 , it is present.

you should enable by OSAL component

Best regards

Erwan

stefanodimascio9 · ‎2016-02-26

Posted on February 26, 2016 at 11:18

I'm talking about the first one.

So:

I can just write an assembly routine, and I have to add at some point (I don't know exactly) of ivor.s:

#if CORE_SUPPORTS_DECREMENTER

/*

* _IVOR1

*/

.align 4

.globl _IVOR1

.type _IVOR1, @function

_IVOR1:

/* Creation of the external stack frame (extctx structure).*/

stwu %sp, -80(%sp) /* Size of the extctx structure.*/

#if PPC_USE_VLE && CORE_SUPPORTS_VLE_MULTI

e_stmvsrrw 8(%sp) /* Saves PC, MSR. */

e_stmvsprw 16(%sp) /* Saves CR, LR, CTR, XER. */

e_stmvgprw 32(%sp) /* Saves GPR0, GPR3...GPR12. */

#else /* !(PPC_USE_VLE && CORE_SUPPORTS_VLE_MULTI) */

stw %r0, 32(%sp) /* Saves GPR0. */

mfSRR0 %r0

stw %r0, 8(%sp) /* Saves PC. */

mfSRR1 %r0

stw %r0, 12(%sp) /* Saves MSR. */

mfCR %r0

stw %r0, 16(%sp) /* Saves CR. */

mfLR %r0

stw %r0, 20(%sp) /* Saves LR. */

mfCTR %r0

stw %r0, 24(%sp) /* Saves CTR. */

mfXER %r0

stw %r0, 28(%sp) /* Saves XER. */

stw %r3, 36(%sp) /* Saves GPR3...GPR12. */

stw %r4, 40(%sp)

stw %r5, 44(%sp)

stw %r6, 48(%sp)

stw %r7, 52(%sp)

stw %r8, 56(%sp)

stw %r9, 60(%sp)

stw %r10, 64(%sp)

stw %r11, 68(%sp)

stw %r12, 72(%sp)

#endif /* !(PPC_USE_VLE && CORE_SUPPORTS_VLE_MULTI) */

/*routine execution */

b _ivor_exit

#endif /* CORE_SUPPORTS_DECREMENTER */

Do I miss something?

Erwan YVIN · ‎2016-03-01

Posted on March 01, 2016 at 14:28

Hello Stefano ,

i think that it should be ok.

What is your way to generate IVOR1 ?

Best regards

Erwan

stefanodimascio9 · ‎2016-03-01

Posted on March 01, 2016 at 14:49

That's something I'm struggling with: I need it in order to handle uncorrectable errors. I must disable ECSM reporting because I don't want a reset on DED in my application, but I don't have any mechanism to inject a DED avoiding reset: even if I enable ECSM reporting just for the injection, as the error is injected with

SPP_MCM.EEGR.R= 0x0220; //uncomment these three lines to inject uncorrectable error

0x00014008: 70 1F E7 F4 E_LIS R0,0xFFF4

0x0001400C: 70 E0 02 20 E_LI R7,0x220

0x00014010: 01 06 SE_MR R6,R0

0x00014012: 5C E6 00 4A E_STH R7,0x4A(R6)

*((uint32_t *) 0x40002000) = PATTERN;

0x00014016: 62 10 SE_BGENI R0,0x1

0x00014018: 65 20 SE_BSETI R0,0x12

0x0001401A: 70 EA E5 55 E_LIS R7,0x5555

0x0001401E: 70 EA C5 55 E_OR2I R7,0x5555

0x00014022: 01 06 SE_MR R6,R0

0x00014024: D0 76 SE_STW R7,0x0(R6)

SPP_MCM.EEGR.R= 0x0000;

0x00014026: 70 1F E7 F4 E_LIS R0,0xFFF4

0x0001402A: 48 07 SE_LI R7,0x0

0x0001402C: 01 06 SE_MR R6,R0

0x0001402E: 5C E6 00 4A E_STH R7,0x4A(R6)

I have a reset on the execution of: 0x00014016: 62 10 SE_BGENI R0,0x1

This is not the behavior I expect, as on the manual is written that ECC is calculated on writings and checked at readings.