STM32F030x DMA offset by 1 half-word (2 bytes)

walworc · ‎2015-10-08

Posted on October 09, 2015 at 05:21

Hello,

I find that DMA works correctly, but that an internal hardware counter (register) [IMHO] starts the DMA off by one word. Link to example is below. (i.e. first sample is placed into array[1], last sample is placed into array[0].

Within the datasheet, the obvious culprets would seem to be:

1. DMA_CNDTRx,

2. DMA_CMARx

or,

3. Failure to clear out the DMA_InitStructure.

For 1 and 2, I tried adjusting to 0, and buffer-size and buffer-size-1, Buffer-size+1, etc.

For 3, I memset the struct to zero.

I suspect that (in the case of the sample code below) the HW is not quite set-up correctly. Even after reset.

I found some discussion of a M0AR register, which I can find no documentation for.

Is there a way to access the internal registers so that I could force an allignment? Or, is there a-non-obvious bug I missed?

Advise, please.

-Chris

I refer to this link:

#stm32f030-analog-dma-count-error

waclawek.jan · ‎2015-10-09

Posted on October 09, 2015 at 12:29

> culprits

> 1. DMA_CNDTRx,

> 2. DMA_CMARx

No. It's most probably a pending dma-request from the ADC.

I don't use ADC with DMA, so I don't know the answer, but a similar issue is with timer, https://my.st.com/public/STe2ecommunities/mcu/Lists/cortex_mx_stm32/Flat.aspx?RootFolder=https%3a%2f%2fmy.st.com%2fpublic%2fSTe2ecommunities%2fmcu%2fLists%2fcortex_mx_stm32%2fHow%20to%20clear%20pending%20DMA%20request&FolderCTID=0x01200200770978C69A1141439FE559EB459D7580009C4E14902C3CDE46A77F0FFD065...

JW

walworc · ‎2015-10-09

Posted on October 09, 2015 at 18:45

Hi, I MAY have solution, in that I can cause DMA to fill at [0] with expected results, need to test that other results are also alligned as expected. I'll post again once solution is confirmed.

Look at direction flag if you want to examine before I prove solution. [Not sure why direction flag might induce an offset.] Perhaps my worldview of uC is Haarvard vs. ARM? Likely.

-Chris