Keil-Atollic GCC Issue (SPI communcation)

[rumlyen]

Posted on December 21, 2016 at 11:59

Hi,

For 32KB code limit, I need to convert my working Keil Project (STM32L476) to Atollic Truestudio 7.1.

For the SPI1 (Accelerometer) communication, the following LL code works perfectly in Keil, but nothing is receiving in same Atollic compiled code. I'm quite new with this GCC compiler. Would you please provide a suggestion what to modify in this piece of code.

Thank in Advance.

#define READ_REG(REG)         ((REG))

__STATIC_INLINE void LL_SPI_TransmitData8(SPI_TypeDef *SPIx, uint8_t TxData)

{  *((__IO uint8_t *)&SPIx->DR) = TxData;}

__STATIC_INLINE uint8_t LL_SPI_ReceiveData8(SPI_TypeDef *SPIx)

{  return (uint8_t)(READ_REG(SPIx->DR));}

My Code: (ADXL362)

-------------------

void ACC_SPI_SendData(uint8_t adress, uint8_t data){

    GPIOB->BRR= GPIO_BSRR_BS0;  // CS_n RESET (enable)        while(!(SPI1->SR & SPI_SR_TXE)); //transmit buffer empty?    LL_SPI_TransmitData8(SPI1,0x0A); // Write Command 0x0A    while(!(SPI1->SR & SPI_SR_RXNE)); //data received?      SPI1->DR; //Clear RXNE bit        while(!(SPI1->SR & SPI_SR_TXE)); //transmit buffer empty?    LL_SPI_TransmitData8(SPI1,adress);// Send adress where to write    while(!(SPI1->SR & SPI_SR_RXNE)); //data received?      SPI1->DR; //Clear RXNE bit

    while(!(SPI1->SR & SPI_SR_TXE)); //transmit buffer empty?

      LL_SPI_TransmitData8(SPI1,data);// Send data what to write    while(!(SPI1->SR & SPI_SR_RXNE)); //data received?      SPI1->DR; //Clear RXNE bit

    GPIOB->BSRR= GPIO_BSRR_BS0;  // CS_n SET (disable)

}

int16_t X,Y,Z;

void Acc_GetXYZ_Buf(void){

      uint8_t indexB=0;     int16_t xyzValB[6] = {0, 0, 0, 0, 0, 0}; // temprary         GPIOB->BRR= GPIO_BSRR_BS0;   // CS RESET (enable)

    while(!(SPI1->SR & SPI_SR_TXE)); //transmit buffer empty?

      LL_SPI_TransmitData8(SPI1,0x0B); // Read Command 0x0B    while(!(SPI1->SR & SPI_SR_RXNE)); //data received?    SPI1->DR;                        //Clear RXNE bit        while(!(SPI1->SR & SPI_SR_TXE)); //transmit buffer empty?    LL_SPI_TransmitData8(SPI1,0x0E); // For X,Y,Z 16bit value: starting address of 6 consecutive register    while(!(SPI1->SR & SPI_SR_RXNE)); //data received?    SPI1->DR;                        //Clear RXNE bit

    for (indexB = 0; indexB < 6; indexB++)

    {    while(!(SPI1->SR & SPI_SR_TXE)); //transmit buffer empty?    LL_SPI_TransmitData8(SPI1,0x00);   // Dummy    while(!(SPI1->SR & SPI_SR_RXNE)); //data received?    xyzValB[indexB]=SPI1->DR;        // Saved in temp buffer    }        X= ((xyzValB[1]) << 😎 + xyzValB[0];    Y= ((xyzValB[3]) << 😎  + xyzValB[2];    Z= ((xyzValB[5]) << 😎 + xyzValB[4];

        GPIOB->BSRR= GPIO_BSRR_BS0;  // B2 CS SET (disable)        

}

void IMU_SPI1_Init(void)     

    {// Configure SCK Pin connected to PA5, MISO PA6, MOSI PA7  LL_GPIO_SetPinMode(GPIOA, LL_GPIO_PIN_5, LL_GPIO_MODE_ALTERNATE);  LL_GPIO_SetAFPin_0_7(GPIOA, LL_GPIO_PIN_5, LL_GPIO_AF_5);  LL_GPIO_SetPinSpeed(GPIOA, LL_GPIO_PIN_5, LL_GPIO_SPEED_FREQ_VERY_HIGH);  LL_GPIO_SetPinOutputType(GPIOA, LL_GPIO_PIN_5, LL_GPIO_OUTPUT_PUSHPULL);  LL_GPIO_SetPinPull(GPIOA, LL_GPIO_PIN_5, LL_GPIO_PULL_NO);

  LL_GPIO_SetPinMode(GPIOA, LL_GPIO_PIN_6, LL_GPIO_MODE_ALTERNATE);

  LL_GPIO_SetAFPin_0_7(GPIOA, LL_GPIO_PIN_6, LL_GPIO_AF_5);  LL_GPIO_SetPinSpeed(GPIOA, LL_GPIO_PIN_6, LL_GPIO_SPEED_FREQ_VERY_HIGH);  LL_GPIO_SetPinOutputType(GPIOA, LL_GPIO_PIN_6, LL_GPIO_OUTPUT_PUSHPULL);  LL_GPIO_SetPinPull(GPIOA, LL_GPIO_PIN_6 , LL_GPIO_PULL_NO);          LL_GPIO_SetPinMode(GPIOA, LL_GPIO_PIN_7, LL_GPIO_MODE_ALTERNATE);  LL_GPIO_SetAFPin_0_7(GPIOA, LL_GPIO_PIN_7, LL_GPIO_AF_5);  LL_GPIO_SetPinSpeed(GPIOA, LL_GPIO_PIN_7, LL_GPIO_SPEED_FREQ_VERY_HIGH);  LL_GPIO_SetPinOutputType(GPIOA, LL_GPIO_PIN_7, LL_GPIO_OUTPUT_PUSHPULL);  LL_GPIO_SetPinPull(GPIOA, LL_GPIO_PIN_7, LL_GPIO_PULL_NO);

     RCC->APB2ENR |= RCC_APB2ENR_SPI1EN;  // SPI1 clock Enable

MODIFY_REG(SPI1->CR1, SPI_CR1_BR, LL_SPI_BAUDRATEPRESCALER_DIV16);   // Baud rate. APB2=48 MHz, SPI clock= 48/16= 3MHz  

MODIFY_REG(SPI1->CR1, SPI_CR1_RXONLY | SPI_CR1_BIDIMODE | SPI_CR1_BIDIOE, LL_SPI_FULL_DUPLEX);  // Default Bidirectional CommMODIFY_REG(SPI1->CR1, SPI_CR1_CPHA, LL_SPI_PHASE_1EDGE);   MODIFY_REG(SPI1->CR1, SPI_CR1_CPOL, LL_SPI_POLARITY_LOW); MODIFY_REG(SPI1->CR1, SPI_CR1_LSBFIRST, LL_SPI_MSB_FIRST); MODIFY_REG(SPI1->CR2, SPI_CR2_DS, LL_SPI_DATAWIDTH_8BIT);//WRITE_REG(SPI1->CRCPR, (uint16_t)0x07);  // CRC polynomial default 7MODIFY_REG(SPI1->CR1, SPI_CR1_SSM,  LL_SPI_NSS_SOFT); // NSS mode Software for multiple masterMODIFY_REG(SPI1->CR2, SPI_CR2_SSOE, ((uint32_t)(LL_SPI_NSS_SOFT >> 16U)));MODIFY_REG(SPI1->CR1, SPI_CR1_MSTR | SPI_CR1_SSI, LL_SPI_MODE_MASTER); MODIFY_REG(SPI1->CR2, SPI_CR2_FRXTH, SPI_CR2_FRXTH);SET_BIT(SPI1->CR1, SPI_CR1_SPE);         // Enable SPI1}

[AvaTar]

Posted on December 21, 2016 at 13:54

Have you turned off all optimizations ?

I would recommend a scope (or logic analyzer) to check >>what<< does not work (i.e. cross-check with the Keil project).

And debugging, since I have neither the Keil nor Atollic toolchain.

[Tesla DeLorean]

Posted on December 21, 2016 at 17:12

If I suspected the compiler, I'd look critically at a disassembly of the code from both.

Look at what version of GNU/GCC is being used.