STM32F103RCT6 backup domain access procedure not always needed.

[dbabula]

Posted on January 16, 2016 at 15:45

Hello,

I'm writing a module for STM32F103RCT6 which is Backup domain module (BRAM). In Reference manual there are a lot of functionalities which requires enabling write access to the backup domain. However after I've tested this it seems to me not completely true. I see that I'm able to read from the Backup RAM through the BRAM_read(...) function without enabling access to the backup domain. I've observed also the same by toogling rtc clock through function BRAM_toogle_rtc_clock(...). On the other side writing to backup  ram and enabling LSE clock require enabling backup domain. Can someone explain this phenomenon to me. I'd really appreciate your help. Please find code in attachment.

[dbabula]

Posted on January 18, 2016 at 12:13

Hi,

I think I found where is my problem. Namely bram_detach() function which was defined by me like this, wasn't working:

static
inline
void
bram_detach(
void
)
{
RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR | RCC_APB1Periph_BKP, DISABLE);
PWR_BackupAccessCmd(DISABLE);
}

It should be written like this:

static
inline
void
bram_detach(
void
)
{
PWR_BackupAccessCmd(DISABLE);
RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR | RCC_APB1Periph_BKP, DISABLE); 
}

I hope solution will help someone.