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Maximal toggling frequency of STM8

FLast.19.71
Associate II
Posted on October 07, 2016 at 15:06

Hi,

I have just started with STM8 and would like to found the fastest toggling method.

Currently I have best result with following code:

while (1)

{

#pragma asm

push A

pushw X

ld A, #1 // toggle with pin D0

ldw X, #0x500f // GPIOD (port D output latch)

clr (X)

ld (X), A

clr (X)

ld (X), A

clr (X)

ld (X), A

clr (X)

ld (X), A

clr (X)

ld (X), A

clr (X)

ld (X), A

popw X

pop A

#pragma endasm

}

The block of 6x CLR / LD makes ''bit clear'' / ''bit set''.

Size of both instructions is 1 byte, so fetching shouldn't cause any delay.

The result is Low 62.5ns / High 125ns (i.e. 1c/2c @16MHz), repeating 6x.

I don't understand why the 1c/1c toggling is not achieved.

I would like to ask for explanation of this and solution for 1c/1c toggling (if possible).

Thanks

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