Does Reseting a peripheral clock reset the peripheral registers?

[bradleybare]

Posted on December 21, 2016 at 15:57

Hello,

If I set a bit in the RCC_AHB1RSTR or other clock corresponding registers. Does it reset the configuration registers for the peripheral?

I ask because I remember reading it, however, I cannot find my source. 

Thank you,

Bradley

#beartrapsfortheunwary

[waclawek.jan]

Posted on December 21, 2016 at 16:57

Yes. It even resets registers in the given peripheral which are invisible to the user (e.g. the shifted-bit-counter in SPI and similar, if reset happens amidst an ongoing communication).

Nobody said the _RSTR registers are related to *clock*. RCC stands for Reset and Clock Control.

JW

[Tesla DeLorean]

Posted on December 21, 2016 at 17:04

The Reference Manual might be a good place to look

Bit 4 CRYPRST: Cryptographic module reset

Set and cleared by software.0: does not reset the cryptographic module1: resets the cryptographic module

I'd probably make sure the clock is enabled, because it is less clear whether the reset is synchronous or asynchronous.

[waclawek.jan]

Posted on December 21, 2016 at 17:11

Clive One wrote:

I'd probably make sure the clock is enabled, because it is less clear whether the reset is synchronous or asynchronous.

+1

ST (if anybody listens): worth one sentence of explanation in the RMs.

[Tesla DeLorean]

Posted on December 21, 2016 at 18:08

Based on my perception of how this was designed and tested, I'd bet there are synchronous elements that need clocking to reset properly. There are a couple of peripherals using third-party IP, they are unlikely to be understood at a gate level.

Things like the HASH, CRYPT, USB and SDIO need the PLL running, and at the right frequency, to function properly on the F4 design.

♯

‌

[bradleybare]

Posted on December 21, 2016 at 22:37

Thank you for the information! That really helped and it works! Now, do I need to reset the bit manually? Or will it reset on its own after the reset. I can't find any documentation on it.

[bradleybare]

Posted on December 21, 2016 at 22:42

I checked the reset set bit. Well it doesn't run without the bit reset. So how many cycles do I need to set the bit to allow the peripheral to reset?

Thanks!

[Tesla DeLorean · Accepted solution]

Posted on December 21, 2016 at 22:53

Correct it holds the device in reset for the duration the bit is high, so write it high, write it low. The back-to-back writes will have a couple of machine cycles between them as the transactions go through the write buffers onto the bus.

The erratas do discuss a hazard in writing the clock enable to touching the peripheral registers, but the reset is in the RCC.

For my money, enable the clock, reset high, reset low, fill in InitStructures, initialize would seem to burn enough cycles to never see the errata.