Capturing image from SONY's image sensor

[M. Jeong]

Posted on September 12, 2016 at 09:57

I have made a board camera module using SONY's IMX225LQR-C image sensor. The following is its data sheet. I would like to ask a question about page 49 of this data sheet. 

http://astroccd.org/wp-content/uploads/2016/01/IMX225LQR-C_E_TechnicalDatasheet_Rev0.2.pdfI used STM32F429I-DISCOVERY board for testing the camera. After setting the registers of the sensor via I2C, I'm wondering if I can capture image from this sensor using DCMI. When you have a look at the page 49 of the data sheet above, you would find that this sensor is  different from OV7670 and OV9655 sensor. It has 'SAV', 'EAV' in pixel data...The sensor generates Hsync, Vsync signals, which is common. But also it generates Start of Active Video and End of Active Video data in the D0~D9 lines. Thus my STM32F429 needs to detect a specific sequence of 10-bit numbers and capture images only when you get the specific 4 x 10-bit SAV from D0~D9 lines. Also on page 49 it's written that you have undefined delay between Hsync and SAV, which means it's not recommended to detect Hsync and then capture the data immediately. Would it be possible for DCMI to detect SAV and capture data? From data sheet of STM32F429 I found that you have hardware synchronisation and embedded synchronisation. If I have understood correctly, I have to use the embedded synchronisation. But this sensor outputs 10-bit data... Would it mean the STM32F429 is not a proper MCU? 

[Sebastian Gniazdowski]

Posted on January 12, 2017 at 16:34

I have the same question. Any updates from you? I'm planning to use Analog Devices ADV7280, which outputs ITU-R BT.656 with embedded synchronization codes (which are SAV, EAV). My board will be NUCLEO-F767ZI on STM32F767ZIT6. All pins seem to match perfectly to DCMI interface: SCL, VSYNC, PIXCLK, SDA, HSYNC, D0-D7. Except for MCO, I cannot find corresponding pin in ADV7280. Any help on this?

But most of all I wonder about SAV and EAV codes like you. Are they supported?

Best regards,

Sebastian

[Imen.D]

Posted on January 13, 2017 at 15:51

Hello,

Please have a look to the camera datasheet and your

http://www.st.com/resource/en/reference_manual/dm00224583.pdf

manual in the Digital camera interface (DCMI) section for more clarification about this topic which mentioned that t

he digital camera interface supports 2 synchronization modes:

• Hardware synchronization mode (HSYNC)
• Embedded data synchronization mode  (VSYNC)

Best Regards

ImenD

[Sebastian Gniazdowski]

Posted on January 13, 2017 at 16:15

I have also used CubeMX, selected DCMI and there is 'Slave 8-bit Embedded Synchro' – 8 data pins and one pixel clock pin are highlighted as to-connect ones. Besides this there is e.g. 'Slave 8-bit External Synchro' that yields two more pins (with HSYNC and VSYNC) to be connected. (That said, the reference mentions 'HCLK': 'The digital camera interface uses two clock domains PIXCLK and HCLK. The signals generated with PIXCLK are sampled on the rising edge of HCLK once they are stable.', any tip is welcomed).

Reference explains the topic as you pointed. It mentions 'Mode 1' of embedded synchronization which is 'ITU656 compatible'. This suggest that video-decoder ICs (TI or AD or other) should be supported. If anyone could confirm this it would be of great value. One thing bothers me – interleaved mode, as reference doc says:

'Camera modules can have 8 such codes (in interleaved mode). For this reason, the interleaved mode is not supported by the camera interface (otherwise, every other half- frame would be discarded).'

Best regards,

Sebastian