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Nucleo F746 ADC DMA noise on the second half transfer!!!

kylongmu
Associate II
Posted on October 07, 2016 at 06:53

I tied the ADC in to GND, make the ADC DMA work normal mode, what ever I change the transfer size, the nois is big different just in the middle.

Crazzy!!!

0690X00000603NMQAY.jpg

Data shows in the figure is 16bit AD1,AD2,AD1,AD2.....

/*ADC configed multi-mode*/

    multimode.Mode = ADC_DUALMODE_REGSIMULT;

    multimode.DMAAccessMode = ADC_DMAACCESSMODE_2;

    multimode.TwoSamplingDelay = ADC_TWOSAMPLINGDELAY_5CYCLES;

    HAL_ADCEx_MultiModeConfigChannel(&Adc1Handle, &multimode);

    HAL_ADCEx_MultiModeConfigChannel(&Adc2Handle, &multimode);

 
3 REPLIES 3
kylongmu
Associate II
Posted on October 07, 2016 at 07:17

This is two ADC's sepreat display.

0690X00000603NRQAY.jpg

kylongmu
Associate II
Posted on October 07, 2016 at 07:34

Samples at 1MHz, total ADC time was tested by a timer is 1024*3 uS, so the sample point is correct.

I think the problem reason is the DMA config, need some times to understand! 

Tie ADC1 to VCC, ADC2 to GND, and memset all data to 0, now the figure is:

0690X00000603NWQAY.jpg

Walid FTITI_O
Senior II
Posted on October 10, 2016 at 18:29

Hi qiyong.mu.001, 

The noise may come from spurious charge shots out of AD inputs. Try to eliminate that with the using of ''Averaging'' or ''Digital-signal filtering'' methods described in the application note 

http://www.st.com/content/ccc/resource/technical/document/application_note/group0/3f/4c/a4/82/bd/63/4e/92/CD00211314/files/CD00211314.pdf/jcr:content/translations/en.CD00211314.pdf

''How to get the best ADC accuracy in STM32Fx Series and STM32L1 Series devices'' (page 22 and page 32)

-Hannibal-