Posted on November 04, 2016 at 16:48While debugging an issue I discovered that on the STM32F103RD/VD silicon, GPIOC pin 2 defaults to SET/1 in the ODR. All other GPIO ports default to RESET/0. While it is always good practice to explicitly set the ODR to a default state, in our case we were simply changing GPIOC_2 to a push-pull output and got quite a surprise when the connected circuit went active.
I didn't see this listed in the ST errata document for the STM32 high-density line (DocID14732 Rev 14 / ES0340). Thought this might help others experiencing unexpected behavior on GPIOC.
