St92F150 errata sheet

[renaud23]

Posted on April 11, 2003 at 19:32

St92F150 errata sheet

[renaud23]

Posted on May 17, 2011 at 11:33

On page 5 of version 1.7 of the ST9F150/F250 Errata Sheet (Sept 2002),

there is a work-around to correct software reset. It states to set the XT_DIV16 bit which is bit 1 but bit 1 is LOCK. XT_DIV16 is bit 4. Could you let me know which to set? XT_DIV16 or LOCK? Same question for CKAF_SEL which is bit 3

[johan239955_stm1_stmicro]

Posted on May 17, 2011 at 11:33

You are correct regarding your first comment (that's a typo). CKAF_SEL is however located in bit 2 and not bit 3.

You should have read : Before generating a software reset, select CLOCK2 as Internal Clock. To do this: – Reset the CSU_CKSEL bit (Bit 0 of CLK_FLAG, R242 page 55), – Set the XT_DIV16 bit (Bit 3 of CLK_FLAG, R242 page 55), – Reset the CKAF_SEL bit (Bit 2 of CLKCTL, R240, page 55). Jojo