Posted on December 20, 2004 at 07:42Hi.
ah, the documents (Data sheet and programmer's man) does not clearly specify which section they are talking about DIMMs and which section is dealing with component memories. I said that there has been some kind of 'abuse' of the notion. they are like this.
A. in the response to the Email sent to ST Micro staff, they said like this:
---
''For our memory control, two key points please advice to
customer:
1. All memory Banks must be ''64-bit'' wide.
2. Memory size under 128MBytes.
Please refer the attached schematic.
The K4S561632 is 4M x 16bit x 4 Banks SDRAM, and the
memory size is 32MBytes. Because it is 64Mbits 4 Banks, for
the MEM_REG2 is 10b.
If any information still not clear, welcome to discuss with me. ''
Warmest Regards
---
'in usual note', K4S561632 is 256Mbit device. so if the'memory size' for this device can be regarded as '64Mbits' as 'in their note', then accroding to criteria 2, one component SDRAM memory bank can be made up with conventional '512Mbit device' such as K4S511632B from SAMSUNG. (and.. with this, what you have concerned can be easily solved..)
I think A in above is what concerns with their PROGRAMMER'S
MANUAL.
let's do some math based on 'A'. i will use 'usual note' and 'their note'. 'in usual note' K4S561632 is '256Mbit' device and 'in their note' it is a '64Mbit' device. so, we can have an equation which shows relation ship between the two notes.
I suspect the PROGRAMMER'S MANUAL must be written considering SDRAM DIMM structure.
as you may know, usual DIMM is made with 4,8,16bit devices. i can't find a DIMM with 32bit device. though we can find one, we shouldn't do our design based on such a rare configuration. so, think we have to put at least 4 devices in one DIMM bank. then 256Mbytes / 4 devices = 64Mbytes each device.
guess we have to use a 256Mbit device for it, then
(256Mbits /
😎 * x = 64Mbytes , x = 2 banks.
I think this is the trick that fooled us in their PROGRAMMER'S MAN.
ON THE CONTRARY, THE ARTICLE IN DATASHEET IS TOTALLY BASED ON ACTUAL DEVICE CONFIGURATION.
The contents in table. 6-5 in datasheet exactly coincides with that of actual dram device data sheet. the row address and column address can be uniquely defined according to each device's actual address decoding scheme.
i.e.) the notion in datasheet does not coincides with that in programmer's manual
Does this bother you in programming sdram bank? well, i didn't know that at first. below is the assembly source code in STM's BIOS writer's guide.
-----
IF STPC_SDRAM_CONTROLLER AND (STPC_CONSUMER_S EQ 0)
; Detect the SDRAM configuration (16Mb / 2 banks, 64/128Mb / 2 banks or
; 64/128Mb / 4 banks) by testing for bank 0 the 3 modes and keep the one
; that gives the highest size.
; STPC Vega also supports 256Mb / 4 banks configuration.
cmp ch, STPC_MEM_BANK0 ; bank 0?
jne @@AlreadyDetected ; no, skip test
mov edi, STPC_MEM_REG1
or byte ptr ds:[edi], 00100000b ; select 16mA for 64/128Mb config
add di, 4 ; select STPC_MEM_REG2
mov al, ds:[edi] ; AL = current configuration
cmp ah, bh ; current size <= previous size?
jbe @@NextConfig ; yes, skip
mov bx, ax ; save configuration and size
@@NextConfig:
IF STPC_VEGA
; ===========================================================
; COMMENT IS INSERTED BY JEREMY, WOO
; cmp al, 3 ; last configuration?
; ABOVE IS THE ORIGINAL CODE
;
; IT ONLY DOES CONFIGURATION 00 - 10
;
; BELOW IS THE MODIFIED CODE
cmp al,4 ; do configuration 00 - 11
;=============================================================
ELSE
cmp al, 2 ; last configuration?
ENDIF
jae @@BestConfig ; yes, end detection
inc al ; next configuration
mov ds:[edi], al ; set configuration
sub esi, esi ; restart at address 0
mov edi, 2 SHL 20 ; begin size detection at 2MB
jmp @@FindBankSize
---------
i modified source between ============== s. after that, the BIOS reported
onboard 128MBytes of SDRAMs correctly. i dont planned to expand rams upto
256Mbytes, and no intention to support expansion DIMM. the older design with
GEODE GX-1 has only 64Mbyte of SDRAM on board, so i doubled the device resour
ce and our application is very strict and no arbitrary upscale would be expec
ted.. (sorry. i didn't try the original code myself..)
i don't care what the value in REG2 exactly means. i don't care which one
is right or wrong (DATASHEET and PROGRAMMER'S MAN..) what i need is exact probe of onboard SDRAM bank of 128Mbytes capacity...
according to the datasheets of K4561632 and K4S511632B,
the row address uses A0-A12 (13bits) and column address uses A0-A8 and
A0-A9 each. all range match within the address mapping range in Table. 6-5
so, i think with 4 K4S511632B devices, you can have 256Mbytes of SDRAM.
well you can try that yourself.
🙂 Best regards,
Jeremy.
[ This message was edited by: Twitwity on 20-12-2004 12:14 ]
[ This message was edited by: Twitwity on 20-12-2004 12:22 ]
