spurious PWM problem (lite09)

bleumers_j · ‎2004-11-24

Posted on November 24, 2004 at 09:14

bleumers_j · ‎2004-11-16

Posted on November 16, 2004 at 10:10

Hi,

I'm generating a PWM from a ST7LITE09.

Now i notice that when when the DCR0H and DCROL is updated, sometimes the PWM output is maximum for one period.

I believe the cause of this problem is what is explained in the lite0x datasheet (page 53: caution: ...)

After minimizing the time between writing into those two registers, the problem is not solved (although, it is slightly better).

Has somebody an idea to solve this?

Regards!

jatin · ‎2004-11-16

Posted on November 17, 2004 at 06:37

What is the duty cycle value in your application? If the DCR and ATR values are close, then the DCRx register should be updated just before an OVF event.

bleumers_j · ‎2004-11-23

Posted on November 23, 2004 at 12:06

Thanks for your reply!

The Duty Cycle is variable from 0% upto 100%. So whatever the ATR value is, the problem will stay.

Is there a possibility to check if the OVF event has passed?

jatin · ‎2004-11-23

Posted on November 24, 2004 at 08:02

You can use the OVF interrupt to detect the overflow event. It takes from 10 cpu cycles(minimum) to 22 cpu cycles(maximum) to enter into the overflow interrupt routine. The first task you have to do inside the interrupt routine is to update the DCRH and DCRL values before the compare event occurs because if the DCRx values are not updated before compare event then the PWM line will go high. After that you can clear the OVF flag. Like this:

ld A,#value (2 cycles)

ld DCR0H,A (5 cycles)

ld A,#value (2 cycles)

ld DCR0L,A (5 cycles)

TNZ ATCSR (Now clear the Overflow flag)

(Please note that values updated for DCRx will be copied in the shadow register in the next OVF event.)

Another method that you can use if it suits your application is:

At the start do not enable the PWM

1. Load DCR0H then DCR0L

2. Then wait for overflow

3. Then enable the PWM i.e. set the OE0 bit of PWMCR

In this way when you enable the PWM your DCR0H and DCR0L values would have already been loaded so there is no chance to miss one PWM period.

bleumers_j · ‎2004-11-24

Posted on November 24, 2004 at 09:14

Thanks Jatin, you've solved my problem.

I've chosen your first sollution, but I only enable interrupts each time the PWM duty cycle is changed. At the end of the ISR, the interrupt is disabled again, untill the next DC change...