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Ramping down PWM duty cycle

gmeyer
Associate II
Posted on May 26, 2003 at 06:07

Ramping down PWM duty cycle

2 REPLIES 2
gmeyer
Associate II
Posted on May 17, 2011 at 11:34

I have an application where I'd like to ramp the duty cycle up and down to control the position of a proportional solenoid. I am using the EFT for my PWM. I've simply set the PWM frequency by setting the OC2R and update the duty cycle by modifying OC1R at a high rate.

This works great 99 percent of the time but every so often, the output pin doesn't go low until the next time the counter matches the OC1R. I believe what is happening is that sometimes I change the OC1R from a value above the counter to a value below the current counter.

I was wondering if someone has an elegant solution for these glitches?

See the attached wavefom for further detail.
romain2399
Associate II
Posted on May 17, 2011 at 11:34

We can use the output compare interrupt to modify the compare value just after the compare has occured. But, if it may occur that a compare value is 99% of the scale and the next one is 1% of the scale, depending on your timer frequency, you cannot garantee that one spurious case would not occur.

You can also compare the timer value and the new compare value, and update the compare value only if the difference is big enough, taking into account that the timer is still running during this code execution.

Note: the MFT provides a better management: it is possible to modify the compare value on the fly as it will be reloaded from the REG0 following the compare event. In addition, it is possible to use a DMA table.