ADC Question

[paulbrown9]

Posted on December 17, 2004 at 05:30

ADC Question

[paulbrown9]

Posted on December 09, 2004 at 08:29

Although the ADC is said to be 12 bit applying 0 to the A-D input gives a reading of 2430 and applying +2.5 gves a reading of 1583. This is only a difference of 3249 and not 4096.

Because of the inaccuracy of the A-D convertor and having to calibrate it it would be beneficial to not have the full range just in case the base reading was not the absolute lowest reading. In my case I could sample a reading of 2430 for the gnd value but then receive a 2429 reading in the application. This would currently be seen as a large positive reading whereas I need to treat everything near to 2430 as GND. The question is will the way the A-D work always mean that I will never get the full 4096 difference for a 2.5v maximum input or do I need to clamp the maximum to below this value so as not to have trouble with the 0V reference. P.

[per2]

Posted on December 09, 2004 at 09:43

Another question regarding the ADC.

The AD inputs will measure signals between 0v - 2.5v. But what about signal levels 2.5v - 3.3v? Will they result in the same value as 2.5v? (4096) or will the result be unpredictable? /Yxan/

[hichem2]

Posted on December 09, 2004 at 13:34

Hi Yxan,

The analog input voltage should not exceed twice the Center Voltage of the Σ-∆ Modulator (2 * VCM) otherwise converter performances cannot be guaranteed Also the VCM Voltage has an accuracy of +/- 5% which imposes a calibration of the converter. (PLZ refer to the STR71x reference manual for more description). Best REgards. Hich 😉

[hichem2]

Posted on December 17, 2004 at 05:30

Hi ReservoirGerbils,

Apologize for the delay. I can not understand exactly how you had these results, but I thinks that you have to take in your mind that the converted value stored in ADC_DATA[n] register is a signed two’s complent value. Hope this can help you!! Best regards HICH :p