Posted on December 16, 2004 at 06:49Hi,
We are using in our project the STR710FZ2T6-Processor and have the following big Problem:
We need to program the PRCCU-block to obtain the outputfrequency RCLK of 28MHz (with a input at CK of 4MHz)
therefore we program the PLL1-Registers with the following Data:
PRCCU_PLL1CR=0x00000063 -> MX0=0/MX1=1(PLL mult. x 28), FREF_RANGE=1,DX2..0=011
PRCCU_CFR=0x00000009 -> DIV2=0, CK2_16=1, CSU_CKSEL=1;
With these port settings we expect a outputfrequency of 28MHz but obtain only 24MHz via the CKOUT-Pin of the CPU!
We checked out all ohter configurations of the MX-Bits. The outputfrequencies of the other MX-combinations are connect
(12/16/20Mhz).
What's going wrong? Is it not possible to get the right Frequency on a multiple factor of 28 (MX1=1, MX0=0) ? Are there any
workarounds or is the Chip not able to generate a Frequency with a multiple factor of 28 for the PLL1 ?
regards,
CEL-Team
