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uPSD321x documentation

wek2
Associate II
Posted on November 11, 2005 at 06:39

uPSD321x documentation

1 REPLY 1
wek2
Associate II
Posted on May 17, 2011 at 12:09

Hello all,

Is there any insider from STM listening on this forum? (perhaps the Moderator?) I have a question: Are there any planned updates for the uPSD321x datasheet?

What I have downloaded yesterday is dated December 2004 (although the download page itself said ''2002''...) and there are quite a lot of discrepancies...

What I have mentioned yesterday, for example...

Page 102, Selector Select chapter (very confusing name), rule #2 says, ''Any primary Flash memory sector must not be mapped in the same memory space as another Flash memory sector'', but rule #5 says, ''A secondary Flash memory sector may overlap a primary Flash memory sector'', which one is valid?...

Also the table of FLASH instructions (Table 82 on page 95) is quite a mess, the note numbering in the table doesn't relate to the notes themselves...

The Flash RESET commad description on page 101 says, after programming error ''the Flash memory is put back into normal READ Mode within a few milliseconds of the Reset Flash instruction having been issued'', how much is ''a few milliseconds''???....

The note of table 82 says additional page erase commands have to be issued within 80us but the description on page 100 says 100us, which one is valid?...

The mixing of kilobits and kilobytes when talking about memories, it is nonstandard and very confusing, and in uPSDs it is NOT JUSTIFIED (it was justified a little bit in the PSDs), could that been cleaned up?...

The watchdog is by default on, quite uncommon in '51 derivatives, OK there is a note on page 47 but in the tiniest font, one has to read the datasheet really thoroughly to notice it...

The second UART's and associated SFR bits and pins notation, somewhere it is ''2'' (e.g. SCON2/SBUF2 in Table 16) elsewhere ''1'' (e.g. the pin names, also SMOD1,RCLK1,TCLK1 in PCON - table 27) and yet elsewhere no distinction from the original UART features (e.g. in Table 16 the SFR bit's names)...

Similarly, the UARTs are sometimes denoted as UART0 and UART1, sometimes as 1st and 2nd UART, a clear mess...

Even called USART somewhere...

[edit 21/11/2005]Table 44 on Page 57 (SCON bits description), for modes 2 and 3 it says ''8-bit UART'' while it should be ''9-bit UART'' [/edit]

[edit 22/11/2005 10:17]On Page 34 the Interrupt system description starts with the following statement: ''There are interrupt requests from 10 sources as follows...'' and in the following, 9 sources are listed 🙂 similarly on the Figure 16, Page 35, one of the sources is missing... Clearly result of a quick copy-paste action ;-)[/edit]

In Table 16 it would be nice to have marked the SFRs which are bit addressable...

I am working with this chip for 3 days but am disappointed with the quality of the documentation. It decreases the value of the otherwise very nice chip, isn't it a pity?

Jan Waclawek

[ This message was edited by: wek1 on 21-11-2005 22:01 ]

[ This message was edited by: wek1 on 22-11-2005 10:19 ]